sound/pci/au88x0/au8830.h

Source file repositories/reference/linux-study-clean/sound/pci/au88x0/au8830.h

File Facts

System
Linux kernel
Corpus path
sound/pci/au88x0/au8830.h
Extension
.h
Size
8649 bytes
Lines
253
Domain
Driver Families
Bucket
sound/pci
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

Aureal Vortex Soundcard driver.

    IO addr collected from asp4core.vxd:
    function    address
    0005D5A0    13004
    00080674    14004
    00080AFF    12818

 */

#define CHIP_AU8830

#define CARD_NAME "Aureal Vortex 2"
#define CARD_NAME_SHORT "au8830"

#define NR_ADB 0x20
#define NR_SRC 0x10
#define NR_A3D 0x10
#define NR_MIXIN 0x20
#define NR_MIXOUT 0x10
#define NR_WT 0x40

/* ADBDMA */
#define VORTEX_ADBDMA_STAT 0x27e00	/* read only, subbuffer, DMA pos */
#define		POS_MASK 0x00000fff
#define     POS_SHIFT 0x0
#define 	ADB_SUBBUF_MASK 0x00003000	/* ADB only. */
#define     ADB_SUBBUF_SHIFT 0xc	/* ADB only. */
#define VORTEX_ADBDMA_CTRL 0x27a00	/* write only; format, flags, DMA pos */
#define		OFFSET_MASK 0x00000fff
#define     OFFSET_SHIFT 0x0
#define		IE_MASK 0x00001000	/* interrupt enable. */
#define     IE_SHIFT 0xc
#define     DIR_MASK 0x00002000	/* Direction. */
#define     DIR_SHIFT 0xd
#define		FMT_MASK 0x0003c000
#define		FMT_SHIFT 0xe
#define		ADB_FIFO_EN_SHIFT	0x15
#define		ADB_FIFO_EN			(1 << 0x15)
// The ADB masks and shift also are valid for the wtdma, except if specified otherwise.
#define VORTEX_ADBDMA_BUFCFG0 0x27800
#define VORTEX_ADBDMA_BUFCFG1 0x27804
#define VORTEX_ADBDMA_BUFBASE 0x27400
#define VORTEX_ADBDMA_START 0x27c00	/* Which subbuffer starts */

#define VORTEX_ADBDMA_STATUS 0x27A90	/* stored at AdbDma->this_10 / 2 DWORD in size. */
/* Starting at the MSB, each pair of bits seem to be the current DMA page. */
/* This current page bits are consistent (same value) with VORTEX_ADBDMA_STAT) */

/* DMA */
#define VORTEX_ENGINE_CTRL 0x27ae8
#define 	ENGINE_INIT 0x1380000

/* WTDMA */
#define VORTEX_WTDMA_CTRL 0x27900	/* format, DMA pos */
#define VORTEX_WTDMA_STAT 0x27d00	/* DMA subbuf, DMA pos */
#define     WT_SUBBUF_MASK 0x3
#define     WT_SUBBUF_SHIFT 0xc
#define VORTEX_WTDMA_BUFBASE 0x27000
#define VORTEX_WTDMA_BUFCFG0 0x27600
#define VORTEX_WTDMA_BUFCFG1 0x27604
#define VORTEX_WTDMA_START 0x27b00	/* which subbuffer is first */

/* ADB */
#define VORTEX_ADB_SR 0x28400	/* Samplerates enable/disable */
#define VORTEX_ADB_RTBASE 0x28000
#define VORTEX_ADB_RTBASE_COUNT 173
#define VORTEX_ADB_CHNBASE 0x282b4
#define VORTEX_ADB_CHNBASE_COUNT 24
#define 	ROUTE_MASK	0xffff
#define		SOURCE_MASK	0xff00
#define     ADB_MASK   0xff
#define		ADB_SHIFT 0x8
/* ADB address */
#define		OFFSET_ADBDMA	0x00
#define		OFFSET_ADBDMAB	0x20
#define		OFFSET_SRCIN	0x40
#define		OFFSET_SRCOUT	0x20	/* ch 0x11 */
#define		OFFSET_MIXIN	0x50	/* ch 0x11 */
#define		OFFSET_MIXOUT	0x30	/* ch 0x11 */
#define		OFFSET_CODECIN	0x70 /* ch 0x11 */	/* adb source */
#define		OFFSET_CODECOUT	0x88 /* ch 0x11 */	/* adb target */
#define		OFFSET_SPORTIN	0x78	/* ch 0x13 ADB source. 2 routes. */
#define		OFFSET_SPORTOUT	0x90	/* ch 0x13 ADB sink. 2 routes. */
#define		OFFSET_SPDIFIN	0x7A	/* ch 0x14 ADB source. */
#define		OFFSET_SPDIFOUT	0x92	/* ch 0x14 ADB sink. */
#define		OFFSET_AC98IN	0x7c	/* ch 0x14 ADB source. */
#define		OFFSET_AC98OUT	0x94	/* ch 0x14 ADB sink. */
#define		OFFSET_EQIN		0xa0	/* ch 0x11 */
#define		OFFSET_EQOUT	0x7e /* ch 0x11 */	/* 2 routes on ch 0x11 */

Annotation

Implementation Notes