sound/pci/cs46xx/cs46xx_lib.c
Source file repositories/reference/linux-study-clean/sound/pci/cs46xx/cs46xx_lib.c
File Facts
- System
- Linux kernel
- Corpus path
sound/pci/cs46xx/cs46xx_lib.c- Extension
.c- Size
- 107278 bytes
- Lines
- 3925
- Domain
- Driver Families
- Bucket
- sound/pci
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/pci.hlinux/pm.hlinux/init.hlinux/interrupt.hlinux/slab.hlinux/gameport.hlinux/mutex.hlinux/export.hlinux/module.hlinux/firmware.hlinux/vmalloc.hlinux/io.hsound/core.hsound/control.hsound/info.hsound/pcm.hsound/pcm_params.hcs46xx.hcs46xx_lib.hdsp_spos.h
Detected Declarations
struct ba1_structstruct cs_card_typefunction snd_cs46xx_codec_readfunction snd_cs46xx_ac97_readfunction snd_cs46xx_codec_writefunction snd_cs46xx_ac97_writefunction snd_cs46xx_downloadfunction memcpy_le32function free_module_descfunction load_firmwarefunction snd_cs46xx_clear_BA1function load_firmwarefunction snd_cs46xx_download_imagefunction snd_cs46xx_resetfunction cs46xx_wait_for_fifofunction snd_cs46xx_clear_serial_FIFOsfunction snd_cs46xx_proc_startfunction snd_cs46xx_proc_stopfunction snd_cs46xx_set_play_sample_ratefunction snd_cs46xx_set_capture_sample_ratefunction snd_cs46xx_pb_trans_copyfunction snd_cs46xx_playback_transferfunction snd_cs46xx_cp_trans_copyfunction snd_cs46xx_capture_transferfunction snd_cs46xx_playback_direct_pointerfunction snd_cs46xx_playback_indirect_pointerfunction snd_cs46xx_capture_direct_pointerfunction snd_cs46xx_capture_indirect_pointerfunction snd_cs46xx_playback_triggerfunction scoped_guardfunction scoped_guardfunction snd_cs46xx_capture_triggerfunction _cs46xx_adjust_sample_ratefunction snd_cs46xx_playback_hw_paramsfunction snd_cs46xx_playback_hw_freefunction snd_cs46xx_playback_preparefunction snd_cs46xx_capture_hw_paramsfunction snd_cs46xx_capture_hw_freefunction snd_cs46xx_capture_preparefunction snd_cs46xx_interruptfunction snd_cs46xx_pcm_free_substreamfunction _cs46xx_playback_open_channelfunction snd_cs46xx_playback_openfunction snd_cs46xx_playback_open_rearfunction snd_cs46xx_playback_open_clfefunction snd_cs46xx_playback_open_iec958function scoped_guardfunction snd_cs46xx_playback_close_iec958
Annotated Snippet
struct ba1_struct {
struct {
u32 offset;
u32 size;
} memory[BA1_MEMORY_COUNT];
u32 map[BA1_DWORD_SIZE];
};
MODULE_FIRMWARE("cs46xx/ba1");
static int load_firmware(struct snd_cs46xx *chip)
{
const struct firmware *fw;
int i, size, err;
err = request_firmware(&fw, "cs46xx/ba1", &chip->pci->dev);
if (err < 0)
return err;
if (fw->size != sizeof(*chip->ba1)) {
err = -EINVAL;
goto error;
}
chip->ba1 = vmalloc(sizeof(*chip->ba1));
if (!chip->ba1) {
err = -ENOMEM;
goto error;
}
memcpy_le32(chip->ba1, fw->data, sizeof(*chip->ba1));
/* sanity check */
size = 0;
for (i = 0; i < BA1_MEMORY_COUNT; i++)
size += chip->ba1->memory[i].size;
if (size > BA1_DWORD_SIZE * 4)
err = -EINVAL;
error:
release_firmware(fw);
return err;
}
static __maybe_unused int snd_cs46xx_download_image(struct snd_cs46xx *chip)
{
int idx, err;
unsigned int offset = 0;
struct ba1_struct *ba1 = chip->ba1;
for (idx = 0; idx < BA1_MEMORY_COUNT; idx++) {
err = snd_cs46xx_download(chip,
&ba1->map[offset],
ba1->memory[idx].offset,
ba1->memory[idx].size);
if (err < 0)
return err;
offset += ba1->memory[idx].size >> 2;
}
return 0;
}
#endif /* CONFIG_SND_CS46XX_NEW_DSP */
/*
* Chip reset
*/
static void snd_cs46xx_reset(struct snd_cs46xx *chip)
{
int idx;
/*
* Write the reset bit of the SP control register.
*/
snd_cs46xx_poke(chip, BA1_SPCR, SPCR_RSTSP);
/*
* Write the control register.
*/
snd_cs46xx_poke(chip, BA1_SPCR, SPCR_DRQEN);
/*
* Clear the trap registers.
*/
for (idx = 0; idx < 8; idx++) {
snd_cs46xx_poke(chip, BA1_DREG, DREG_REGID_TRAP_SELECT + idx);
snd_cs46xx_poke(chip, BA1_TWPR, 0xFFFF);
}
snd_cs46xx_poke(chip, BA1_DREG, 0);
/*
Annotation
- Immediate include surface: `linux/delay.h`, `linux/pci.h`, `linux/pm.h`, `linux/init.h`, `linux/interrupt.h`, `linux/slab.h`, `linux/gameport.h`, `linux/mutex.h`.
- Detected declarations: `struct ba1_struct`, `struct cs_card_type`, `function snd_cs46xx_codec_read`, `function snd_cs46xx_ac97_read`, `function snd_cs46xx_codec_write`, `function snd_cs46xx_ac97_write`, `function snd_cs46xx_download`, `function memcpy_le32`, `function free_module_desc`, `function load_firmware`.
- Atlas domain: Driver Families / sound/pci.
- Implementation status: source implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.