sound/pci/ctxfi/ct20k1reg.h

Source file repositories/reference/linux-study-clean/sound/pci/ctxfi/ct20k1reg.h

File Facts

System: Linux kernel
Corpus path: sound/pci/ctxfi/ct20k1reg.h
Extension: .h
Size: 20443 bytes
Lines: 632
Domain: Driver Families
Bucket: sound/pci
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef CT20K1REG_H
#define CT20K1REG_H

/* 20k1 registers */
#define 	DSPXRAM_START 			0x000000
#define 	DSPXRAM_END 			0x013FFC
#define 	DSPAXRAM_START 			0x020000
#define 	DSPAXRAM_END 			0x023FFC
#define 	DSPYRAM_START 			0x040000
#define 	DSPYRAM_END 			0x04FFFC
#define 	DSPAYRAM_START 			0x020000
#define 	DSPAYRAM_END 			0x063FFC
#define 	DSPMICRO_START 			0x080000
#define 	DSPMICRO_END 			0x0B3FFC
#define 	DSP0IO_START 			0x100000
#define 	DSP0IO_END	 		0x101FFC
#define 	AUDIORINGIPDSP0_START 		0x100000
#define 	AUDIORINGIPDSP0_END 		0x1003FC
#define 	AUDIORINGOPDSP0_START 		0x100400
#define 	AUDIORINGOPDSP0_END 		0x1007FC
#define 	AUDPARARINGIODSP0_START 	0x100800
#define 	AUDPARARINGIODSP0_END	 	0x100BFC
#define 	DSP0LOCALHWREG_START 		0x100C00
#define 	DSP0LOCALHWREG_END	 	0x100C3C
#define 	DSP0XYRAMAGINDEX_START 		0x100C40
#define 	DSP0XYRAMAGINDEX_END	 	0x100C5C
#define 	DSP0XYRAMAGMDFR_START 		0x100C60
#define 	DSP0XYRAMAGMDFR_END	 	0x100C7C
#define 	DSP0INTCONTLVEC_START 		0x100C80
#define 	DSP0INTCONTLVEC_END	 	0x100CD8
#define 	INTCONTLGLOBALREG_START 	0x100D1C
#define 	INTCONTLGLOBALREG_END	 	0x100D3C
#define		HOSTINTFPORTADDRCONTDSP0	0x100D40
#define		HOSTINTFPORTDATADSP0		0x100D44
#define		TIME0PERENBDSP0			0x100D60
#define		TIME0COUNTERDSP0		0x100D64
#define		TIME1PERENBDSP0			0x100D68
#define		TIME1COUNTERDSP0		0x100D6C
#define		TIME2PERENBDSP0			0x100D70
#define		TIME2COUNTERDSP0		0x100D74
#define		TIME3PERENBDSP0			0x100D78
#define		TIME3COUNTERDSP0		0x100D7C
#define 	XRAMINDOPERREFNOUP_STARTDSP0 	0x100D80
#define 	XRAMINDOPERREFNOUP_ENDDSP0	0x100D9C
#define 	XRAMINDOPERREFUP_STARTDSP0	0x100DA0
#define 	XRAMINDOPERREFUP_ENDDSP0	0x100DBC
#define 	YRAMINDOPERREFNOUP_STARTDSP0 	0x100DC0
#define 	YRAMINDOPERREFNOUP_ENDDSP0 	0x100DDC
#define 	YRAMINDOPERREFUP_STARTDSP0	0x100DE0
#define 	YRAMINDOPERREFUP_ENDDSP0 	0x100DFC
#define 	DSP0CONDCODE 			0x100E00
#define 	DSP0STACKFLAG 			0x100E04
#define 	DSP0PROGCOUNTSTACKPTREG 	0x100E08
#define 	DSP0PROGCOUNTSTACKDATAREG 	0x100E0C
#define 	DSP0CURLOOPADDRREG 		0x100E10
#define 	DSP0CURLOOPCOUNT 		0x100E14
#define 	DSP0TOPLOOPCOUNTSTACK 		0x100E18
#define 	DSP0TOPLOOPADDRSTACK 		0x100E1C
#define 	DSP0LOOPSTACKPTR 		0x100E20
#define 	DSP0STASSTACKDATAREG 		0x100E24
#define 	DSP0STASSTACKPTR 		0x100E28
#define 	DSP0PROGCOUNT 			0x100E2C
#define  	GLOBDSPDEBGREG			0x100E30
#define  	GLOBDSPBREPTRREG		0x100E30
#define 	DSP0XYRAMBASE_START 		0x100EA0
#define 	DSP0XYRAMBASE_END 		0x100EBC
#define 	DSP0XYRAMLENG_START 		0x100EC0
#define 	DSP0XYRAMLENG_END 		0x100EDC
#define		SEMAPHOREREGDSP0		0x100EE0
#define		DSP0INTCONTMASKREG		0x100EE4
#define		DSP0INTCONTPENDREG		0x100EE8
#define		DSP0INTCONTSERVINT		0x100EEC
#define		DSPINTCONTEXTINTMODREG		0x100EEC
#define		GPIODSP0			0x100EFC
#define 	DMADSPBASEADDRREG_STARTDSP0	0x100F00
#define 	DMADSPBASEADDRREG_ENDDSP0	0x100F1C
#define 	DMAHOSTBASEADDRREG_STARTDSP0	0x100F20
#define 	DMAHOSTBASEADDRREG_ENDDSP0	0x100F3C
#define 	DMADSPCURADDRREG_STARTDSP0	0x100F40
#define 	DMADSPCURADDRREG_ENDDSP0	0x100F5C
#define 	DMAHOSTCURADDRREG_STARTDSP0	0x100F60
#define 	DMAHOSTCURADDRREG_ENDDSP0	0x100F7C
#define 	DMATANXCOUNTREG_STARTDSP0	0x100F80
#define 	DMATANXCOUNTREG_ENDDSP0		0x100F9C
#define 	DMATIMEBUGREG_STARTDSP0		0x100FA0
#define 	DMATIMEBUGREG_ENDDSP0		0x100FAC
#define 	DMACNTLMODFREG_STARTDSP0	0x100FA0
#define 	DMACNTLMODFREG_ENDDSP0		0x100FAC

#define 	DMAGLOBSTATSREGDSP0		0x100FEC

Annotation

Atlas domain: Driver Families / sound/pci.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.