sound/pci/lx6464es/lx_defs.h

Source file repositories/reference/linux-study-clean/sound/pci/lx6464es/lx_defs.h

File Facts

System
Linux kernel
Corpus path
sound/pci/lx6464es/lx_defs.h
Extension
.h
Size
13968 bytes
Lines
362
Domain
Driver Families
Bucket
sound/pci
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef LX_DEFS_H
#define LX_DEFS_H

/* code adapted from ethersound.h */
#define	XES_FREQ_COUNT8_MASK    0x00001FFF /* compteur 25MHz entre 8 ech. */
#define	XES_FREQ_COUNT8_44_MIN  0x00001288 /* 25M /
					    * [ 44k - ( 44.1k + 48k ) / 2 ]
					    * * 8 */
#define	XES_FREQ_COUNT8_44_MAX	0x000010F0 /* 25M / [ ( 44.1k + 48k ) / 2 ]
					    * * 8 */
#define	XES_FREQ_COUNT8_48_MAX	0x00000F08 /* 25M /
					    * [ 48k + ( 44.1k + 48k ) / 2 ]
					    * * 8 */

/* code adapted from LXES_registers.h */

#define IOCR_OUTPUTS_OFFSET 0	/* (rw) offset for the number of OUTs in the
				 * ConfES register. */
#define IOCR_INPUTS_OFFSET  8	/* (rw) offset for the number of INs in the
				 * ConfES register. */
#define FREQ_RATIO_OFFSET  19	/* (rw) offset for frequency ratio in the
				 * ConfES register. */
#define	FREQ_RATIO_SINGLE_MODE 0x01 /* value for single mode frequency ratio:
				     * sample rate = frequency rate. */

#define CONFES_READ_PART_MASK	0x00070000
#define CONFES_WRITE_PART_MASK	0x00F80000

/* code adapted from if_drv_mb.h */

#define MASK_SYS_STATUS_ERROR	(1L << 31) /* events that lead to a PCI irq if
					    * not yet pending */
#define MASK_SYS_STATUS_URUN	(1L << 30)
#define MASK_SYS_STATUS_ORUN	(1L << 29)
#define MASK_SYS_STATUS_EOBO	(1L << 28)
#define MASK_SYS_STATUS_EOBI	(1L << 27)
#define MASK_SYS_STATUS_FREQ	(1L << 26)
#define MASK_SYS_STATUS_ESA	(1L << 25) /* reserved, this is set by the
					    * XES */
#define MASK_SYS_STATUS_TIMER	(1L << 24)

#define MASK_SYS_ASYNC_EVENTS	(MASK_SYS_STATUS_ERROR |		\
				 MASK_SYS_STATUS_URUN  |		\
				 MASK_SYS_STATUS_ORUN  |		\
				 MASK_SYS_STATUS_EOBO  |		\
				 MASK_SYS_STATUS_EOBI  |		\
				 MASK_SYS_STATUS_FREQ  |		\
				 MASK_SYS_STATUS_ESA)

#define MASK_SYS_PCI_EVENTS		(MASK_SYS_ASYNC_EVENTS |	\
					 MASK_SYS_STATUS_TIMER)

#define MASK_SYS_TIMER_COUNT	0x0000FFFF

#define MASK_SYS_STATUS_EOT_PLX		(1L << 22) /* event that remains
						    * internal: reserved fo end
						    * of plx dma */
#define MASK_SYS_STATUS_XES		(1L << 21) /* event that remains
						    * internal: pending XES
						    * IRQ */
#define MASK_SYS_STATUS_CMD_DONE	(1L << 20) /* alternate command
						    * management: notify driver
						    * instead of polling */


#define MAX_STREAM_BUFFER 5	/* max amount of stream buffers. */

#define MICROBLAZE_IBL_MIN		 32
#define MICROBLAZE_IBL_DEFAULT	        128
#define MICROBLAZE_IBL_MAX		512
/* #define MASK_GRANULARITY		(2*MICROBLAZE_IBL_MAX-1) */



/* command opcodes, see reference for details */

/*
 the capture bit position in the object_id field in driver commands
 depends upon the number of managed channels. For now, 64 IN + 64 OUT are
 supported. HOwever, the communication protocol forsees 1024 channels, hence
 bit 10 indicates a capture (input) object).
*/
#define ID_IS_CAPTURE (1L << 10)
#define ID_OFFSET	13	/* object ID is at the 13th bit in the
				 * 1st command word.*/
#define ID_CH_MASK    0x3F
#define OPCODE_OFFSET	24	/* offset of the command opcode in the first
				 * command word.*/

enum cmd_mb_opcodes {

Annotation

Implementation Notes