sound/pci/mixart/mixart_hwdep.h

Source file repositories/reference/linux-study-clean/sound/pci/mixart/mixart_hwdep.h

File Facts

System
Linux kernel
Corpus path
sound/pci/mixart/mixart_hwdep.h
Extension
.h
Size
6067 bytes
Lines
143
Domain
Driver Families
Bucket
sound/pci
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __SOUND_MIXART_HWDEP_H
#define __SOUND_MIXART_HWDEP_H

#include <sound/hwdep.h>

#ifndef readl_be
#define readl_be(x) be32_to_cpu((__force __be32)__raw_readl(x))
#endif

#ifndef writel_be
#define writel_be(data,addr) __raw_writel((__force u32)cpu_to_be32(data),addr)
#endif

#ifndef readl_le
#define readl_le(x) le32_to_cpu((__force __le32)__raw_readl(x))
#endif

#ifndef writel_le
#define writel_le(data,addr) __raw_writel((__force u32)cpu_to_le32(data),addr)
#endif

#define MIXART_MEM(mgr,x)	((mgr)->mem[0].virt + (x))
#define MIXART_REG(mgr,x)	((mgr)->mem[1].virt + (x))


/* Daughter board Type */
#define DAUGHTER_TYPE_MASK     0x0F 
#define DAUGHTER_VER_MASK      0xF0 
#define DAUGHTER_TYPEVER_MASK  (DAUGHTER_TYPE_MASK|DAUGHTER_VER_MASK)
 
#define MIXART_DAUGHTER_TYPE_NONE     0x00 
#define MIXART_DAUGHTER_TYPE_COBRANET 0x08 
#define MIXART_DAUGHTER_TYPE_AES      0x0E



#define MIXART_BA0_SIZE 	(16 * 1024 * 1024) /* 16M */
#define MIXART_BA1_SIZE 	(4  * 1024)        /* 4k */

/*
 * -----------BAR 0 --------------------------------------------------------------------------------------------------------
 */
#define  MIXART_PSEUDOREG                          0x2000                    /* base address for pseudoregister */

#define  MIXART_PSEUDOREG_BOARDNUMBER              MIXART_PSEUDOREG+0        /* board number */

/* perfmeter (available when elf loaded)*/
#define  MIXART_PSEUDOREG_PERF_STREAM_LOAD_OFFSET  MIXART_PSEUDOREG+0x70     /* streaming load */
#define  MIXART_PSEUDOREG_PERF_SYSTEM_LOAD_OFFSET  MIXART_PSEUDOREG+0x78     /* system load (reference)*/
#define  MIXART_PSEUDOREG_PERF_MAILBX_LOAD_OFFSET  MIXART_PSEUDOREG+0x7C     /* mailbox load */
#define  MIXART_PSEUDOREG_PERF_INTERR_LOAD_OFFSET  MIXART_PSEUDOREG+0x74     /* interrupt handling  load */

/* motherboard xilinx loader info */
#define  MIXART_PSEUDOREG_MXLX_BASE_ADDR_OFFSET    MIXART_PSEUDOREG+0x9C     /* 0x00600000 */ 
#define  MIXART_PSEUDOREG_MXLX_SIZE_OFFSET         MIXART_PSEUDOREG+0xA0     /* xilinx size in bytes */ 
#define  MIXART_PSEUDOREG_MXLX_STATUS_OFFSET       MIXART_PSEUDOREG+0xA4     /* status = EMBEBBED_STAT_XXX */ 

/* elf loader info */
#define  MIXART_PSEUDOREG_ELF_STATUS_OFFSET        MIXART_PSEUDOREG+0xB0     /* status = EMBEBBED_STAT_XXX */ 

/* 
*  after the elf code is loaded, and the flowtable info was passed to it,
*  the driver polls on this address, until it shows 1 (presence) or 2 (absence)
*  once it is non-zero, the daughter board type may be read
*/
#define  MIXART_PSEUDOREG_DBRD_PRESENCE_OFFSET     MIXART_PSEUDOREG+0x990   

/* Global info structure */
#define  MIXART_PSEUDOREG_DBRD_TYPE_OFFSET         MIXART_PSEUDOREG+0x994    /* Type and version of daughterboard  */


/* daughterboard xilinx loader info */
#define  MIXART_PSEUDOREG_DXLX_BASE_ADDR_OFFSET    MIXART_PSEUDOREG+0x998    /* get the address here where to write the file */ 
#define  MIXART_PSEUDOREG_DXLX_SIZE_OFFSET         MIXART_PSEUDOREG+0x99C    /* xilinx size in bytes */ 
#define  MIXART_PSEUDOREG_DXLX_STATUS_OFFSET       MIXART_PSEUDOREG+0x9A0    /* status = EMBEBBED_STAT_XXX */ 

/*  */
#define  MIXART_FLOWTABLE_PTR                      0x3000                    /* pointer to flow table */

/* mailbox addresses  */

/* message DRV -> EMB */
#define MSG_INBOUND_POST_HEAD       0x010008	/* DRV posts MF + increment4 */
#define	MSG_INBOUND_POST_TAIL       0x01000C	/* EMB gets MF + increment4 */
/* message EMB -> DRV */
#define	MSG_OUTBOUND_POST_TAIL      0x01001C	/* DRV gets MF + increment4 */
#define	MSG_OUTBOUND_POST_HEAD      0x010018	/* EMB posts MF + increment4 */
/* Get Free Frames */
#define MSG_INBOUND_FREE_TAIL       0x010004	/* DRV gets MFA + increment4 */
#define MSG_OUTBOUND_FREE_TAIL      0x010014	/* EMB gets MFA + increment4 */

Annotation

Implementation Notes