sound/soc/codecs/cs35l45-tables.c

Source file repositories/reference/linux-study-clean/sound/soc/codecs/cs35l45-tables.c

File Facts

System
Linux kernel
Corpus path
sound/soc/codecs/cs35l45-tables.c
Extension
.c
Size
10617 bytes
Lines
333
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
//
// cs35l45-tables.c -- CS35L45 ALSA SoC audio driver
//
// Copyright 2019-2022 Cirrus Logic, Inc.
//
// Author: James Schulman <james.schulman@cirrus.com>

#include <linux/module.h>
#include <linux/regmap.h>

#include "cs35l45.h"

static const struct reg_sequence cs35l45_patch[] = {
	{ 0x00000040,			0x00000055 },
	{ 0x00000040,			0x000000AA },
	{ 0x00000044,			0x00000055 },
	{ 0x00000044,			0x000000AA },
	{ 0x00006480,			0x0830500A },
	{ 0x00007C60,			0x1000850B },
	{ CS35L45_BOOST_OV_CFG,		0x007000D0 },
	{ CS35L45_LDPM_CONFIG,		0x0001B636 },
	{ 0x00002C08,			0x00000009 },
	{ 0x00006850,			0x0A30FFC4 },
	{ 0x00003820,			0x00040100 },
	{ 0x00003824,			0x00000000 },
	{ 0x00007CFC,			0x62870004 },
	{ 0x00007C60,			0x1001850B },
	{ 0x00000040,			0x00000000 },
	{ 0x00000044,			0x00000000 },
	{ CS35L45_BOOST_CCM_CFG,	0xF0000003 },
	{ CS35L45_BOOST_DCM_CFG,	0x08710220 },
	{ CS35L45_ERROR_RELEASE,	0x00200000 },
};

int cs35l45_apply_patch(struct cs35l45_private *cs35l45)
{
	return regmap_register_patch(cs35l45->regmap, cs35l45_patch,
				     ARRAY_SIZE(cs35l45_patch));
}
EXPORT_SYMBOL_NS_GPL(cs35l45_apply_patch, "SND_SOC_CS35L45");

static const struct reg_default cs35l45_defaults[] = {
	{ CS35L45_BLOCK_ENABLES,		0x00003323 },
	{ CS35L45_BLOCK_ENABLES2,		0x00000010 },
	{ CS35L45_SYNC_GPIO1,			0x00000007 },
	{ CS35L45_INTB_GPIO2_MCLK_REF,		0x00000005 },
	{ CS35L45_GPIO3,			0x00000005 },
	{ CS35L45_PWRMGT_CTL,			0x00000000 },
	{ CS35L45_WAKESRC_CTL,			0x00000008 },
	{ CS35L45_WKI2C_CTL,			0x00000030 },
	{ CS35L45_REFCLK_INPUT,			0x00000510 },
	{ CS35L45_GLOBAL_SAMPLE_RATE,		0x00000003 },
	{ CS35L45_ASP_ENABLES1,			0x00000000 },
	{ CS35L45_ASP_CONTROL1,			0x00000028 },
	{ CS35L45_ASP_CONTROL2,			0x18180200 },
	{ CS35L45_ASP_CONTROL3,			0x00000002 },
	{ CS35L45_ASP_FRAME_CONTROL1,		0x03020100 },
	{ CS35L45_ASP_FRAME_CONTROL2,		0x00000004 },
	{ CS35L45_ASP_FRAME_CONTROL5,		0x00000100 },
	{ CS35L45_ASP_DATA_CONTROL1,		0x00000018 },
	{ CS35L45_ASP_DATA_CONTROL5,		0x00000018 },
	{ CS35L45_DACPCM1_INPUT,		0x00000008 },
	{ CS35L45_ASPTX1_INPUT,			0x00000018 },
	{ CS35L45_ASPTX2_INPUT,			0x00000019 },
	{ CS35L45_ASPTX3_INPUT,			0x00000020 },
	{ CS35L45_ASPTX4_INPUT,			0x00000028 },
	{ CS35L45_ASPTX5_INPUT,			0x00000048 },
	{ CS35L45_DSP1_RX1_RATE,		0x00000001 },
	{ CS35L45_DSP1_RX2_RATE,		0x00000001 },
	{ CS35L45_DSP1_RX3_RATE,		0x00000001 },
	{ CS35L45_DSP1_RX4_RATE,		0x00000001 },
	{ CS35L45_DSP1_RX5_RATE,		0x00000001 },
	{ CS35L45_DSP1_RX6_RATE,		0x00000001 },
	{ CS35L45_DSP1_RX7_RATE,		0x00000001 },
	{ CS35L45_DSP1_RX8_RATE,		0x00000001 },
	{ CS35L45_DSP1_TX1_RATE,		0x00000001 },
	{ CS35L45_DSP1_TX2_RATE,		0x00000001 },
	{ CS35L45_DSP1_TX3_RATE,		0x00000001 },
	{ CS35L45_DSP1_TX4_RATE,		0x00000001 },
	{ CS35L45_DSP1_TX5_RATE,		0x00000001 },
	{ CS35L45_DSP1_TX6_RATE,		0x00000001 },
	{ CS35L45_DSP1_TX7_RATE,		0x00000001 },
	{ CS35L45_DSP1_TX8_RATE,		0x00000001 },
	{ CS35L45_DSP1RX1_INPUT,		0x00000008 },
	{ CS35L45_DSP1RX2_INPUT,		0x00000009 },
	{ CS35L45_DSP1RX3_INPUT,		0x00000018 },
	{ CS35L45_DSP1RX4_INPUT,		0x00000019 },
	{ CS35L45_DSP1RX5_INPUT,		0x00000020 },
	{ CS35L45_DSP1RX6_INPUT,		0x00000028 },

Annotation

Implementation Notes