sound/soc/codecs/cs42l52.c

Source file repositories/reference/linux-study-clean/sound/soc/codecs/cs42l52.c

File Facts

System
Linux kernel
Corpus path
sound/soc/codecs/cs42l52.c
Extension
.c
Size
37894 bytes
Lines
1249
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct sp_config {
	u8 spc, format, spfs;
	u32 srate;
};

struct cs42l52_platform_data {

	/* MICBIAS Level. Check datasheet Pg48 */
	unsigned int micbias_lvl;

	/* MICA mode selection Differential or Single-ended */
	bool mica_diff_cfg;

	/* MICB mode selection Differential or Single-ended */
	bool micb_diff_cfg;

	/* Charge Pump Freq. Check datasheet Pg73 */
	unsigned int chgfreq;

	/* Reset GPIO */
	struct gpio_desc *reset_gpio;
};

struct  cs42l52_private {
	struct regmap *regmap;
	struct snd_soc_component *component;
	struct device *dev;
	struct sp_config config;
	struct cs42l52_platform_data pdata;
	u32 sysclk;
	u8 mclksel;
	u32 mclk;
	u8 flags;
	struct input_dev *beep;
	struct work_struct beep_work;
	int beep_rate;
};

static const struct reg_default cs42l52_reg_defaults[] = {
	{ CS42L52_PWRCTL1, 0x9F },	/* r02 PWRCTL 1 */
	{ CS42L52_PWRCTL2, 0x07 },	/* r03 PWRCTL 2 */
	{ CS42L52_PWRCTL3, 0xFF },	/* r04 PWRCTL 3 */
	{ CS42L52_CLK_CTL, 0xA0 },	/* r05 Clocking Ctl */
	{ CS42L52_IFACE_CTL1, 0x00 },	/* r06 Interface Ctl 1 */
	{ CS42L52_ADC_PGA_A, 0x80 },	/* r08 Input A Select */
	{ CS42L52_ADC_PGA_B, 0x80 },	/* r09 Input B Select */
	{ CS42L52_ANALOG_HPF_CTL, 0xA5 },	/* r0A Analog HPF Ctl */
	{ CS42L52_ADC_HPF_FREQ, 0x00 },	/* r0B ADC HPF Corner Freq */
	{ CS42L52_ADC_MISC_CTL, 0x00 },	/* r0C Misc. ADC Ctl */
	{ CS42L52_PB_CTL1, 0x60 },	/* r0D Playback Ctl 1 */
	{ CS42L52_MISC_CTL, 0x02 },	/* r0E Misc. Ctl */
	{ CS42L52_PB_CTL2, 0x00 },	/* r0F Playback Ctl 2 */
	{ CS42L52_MICA_CTL, 0x00 },	/* r10 MICA Amp Ctl */
	{ CS42L52_MICB_CTL, 0x00 },	/* r11 MICB Amp Ctl */
	{ CS42L52_PGAA_CTL, 0x00 },	/* r12 PGAA Vol, Misc. */
	{ CS42L52_PGAB_CTL, 0x00 },	/* r13 PGAB Vol, Misc. */
	{ CS42L52_PASSTHRUA_VOL, 0x00 },	/* r14 Bypass A Vol */
	{ CS42L52_PASSTHRUB_VOL, 0x00 },	/* r15 Bypass B Vol */
	{ CS42L52_ADCA_VOL, 0x00 },	/* r16 ADCA Volume */
	{ CS42L52_ADCB_VOL, 0x00 },	/* r17 ADCB Volume */
	{ CS42L52_ADCA_MIXER_VOL, 0x80 },	/* r18 ADCA Mixer Volume */
	{ CS42L52_ADCB_MIXER_VOL, 0x80 },	/* r19 ADCB Mixer Volume */
	{ CS42L52_PCMA_MIXER_VOL, 0x00 },	/* r1A PCMA Mixer Volume */
	{ CS42L52_PCMB_MIXER_VOL, 0x00 },	/* r1B PCMB Mixer Volume */
	{ CS42L52_BEEP_FREQ, 0x00 },	/* r1C Beep Freq on Time */
	{ CS42L52_BEEP_VOL, 0x00 },	/* r1D Beep Volume off Time */
	{ CS42L52_BEEP_TONE_CTL, 0x00 },	/* r1E Beep Tone Cfg. */
	{ CS42L52_TONE_CTL, 0x00 },	/* r1F Tone Ctl */
	{ CS42L52_MASTERA_VOL, 0x00 },	/* r20 Master A Volume */
	{ CS42L52_MASTERB_VOL, 0x00 },	/* r21 Master B Volume */
	{ CS42L52_HPA_VOL, 0x00 },	/* r22 Headphone A Volume */
	{ CS42L52_HPB_VOL, 0x00 },	/* r23 Headphone B Volume */
	{ CS42L52_SPKA_VOL, 0x00 },	/* r24 Speaker A Volume */
	{ CS42L52_SPKB_VOL, 0x00 },	/* r25 Speaker B Volume */
	{ CS42L52_ADC_PCM_MIXER, 0x00 },	/* r26 Channel Mixer and Swap */
	{ CS42L52_LIMITER_CTL1, 0x00 },	/* r27 Limit Ctl 1 Thresholds */
	{ CS42L52_LIMITER_CTL2, 0x7F },	/* r28 Limit Ctl 2 Release Rate */
	{ CS42L52_LIMITER_AT_RATE, 0xC0 },	/* r29 Limiter Attack Rate */
	{ CS42L52_ALC_CTL, 0x00 },	/* r2A ALC Ctl 1 Attack Rate */
	{ CS42L52_ALC_RATE, 0x3F },	/* r2B ALC Release Rate */
	{ CS42L52_ALC_THRESHOLD, 0x3f },	/* r2C ALC Thresholds */
	{ CS42L52_NOISE_GATE_CTL, 0x00 },	/* r2D Noise Gate Ctl */
	{ CS42L52_CLK_STATUS, 0x00 },	/* r2E Overflow and Clock Status */
	{ CS42L52_BATT_COMPEN, 0x00 },	/* r2F battery Compensation */
	{ CS42L52_BATT_LEVEL, 0x00 },	/* r30 VP Battery Level */
	{ CS42L52_SPK_STATUS, 0x00 },	/* r31 Speaker Status */
	{ CS42L52_TEM_CTL, 0x3B },	/* r32 Temp Ctl */
	{ CS42L52_THE_FOLDBACK, 0x00 },	/* r33 Foldback */
};

Annotation

Implementation Notes