sound/soc/codecs/cs42xx8.h

Source file repositories/reference/linux-study-clean/sound/soc/codecs/cs42xx8.h

File Facts

System
Linux kernel
Corpus path
sound/soc/codecs/cs42xx8.h
Extension
.h
Size
12767 bytes
Lines
236
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct cs42xx8_driver_data {
	char name[32];
	int num_adcs;
};

extern const struct dev_pm_ops cs42xx8_pm;
extern const struct cs42xx8_driver_data cs42448_data;
extern const struct cs42xx8_driver_data cs42888_data;
extern const struct regmap_config cs42xx8_regmap_config;
int cs42xx8_probe(struct device *dev, struct regmap *regmap, struct cs42xx8_driver_data *drvdata);

/* CS42888 register map */
#define CS42XX8_CHIPID				0x01	/* Chip ID */
#define CS42XX8_PWRCTL				0x02	/* Power Control */
#define CS42XX8_FUNCMOD				0x03	/* Functional Mode */
#define CS42XX8_INTF				0x04	/* Interface Formats */
#define CS42XX8_ADCCTL				0x05	/* ADC Control */
#define CS42XX8_TXCTL				0x06	/* Transition Control */
#define CS42XX8_DACMUTE				0x07	/* DAC Mute Control */
#define CS42XX8_VOLAOUT1			0x08	/* Volume Control AOUT1 */
#define CS42XX8_VOLAOUT2			0x09	/* Volume Control AOUT2 */
#define CS42XX8_VOLAOUT3			0x0A	/* Volume Control AOUT3 */
#define CS42XX8_VOLAOUT4			0x0B	/* Volume Control AOUT4 */
#define CS42XX8_VOLAOUT5			0x0C	/* Volume Control AOUT5 */
#define CS42XX8_VOLAOUT6			0x0D	/* Volume Control AOUT6 */
#define CS42XX8_VOLAOUT7			0x0E	/* Volume Control AOUT7 */
#define CS42XX8_VOLAOUT8			0x0F	/* Volume Control AOUT8 */
#define CS42XX8_DACINV				0x10	/* DAC Channel Invert */
#define CS42XX8_VOLAIN1				0x11	/* Volume Control AIN1 */
#define CS42XX8_VOLAIN2				0x12	/* Volume Control AIN2 */
#define CS42XX8_VOLAIN3				0x13	/* Volume Control AIN3 */
#define CS42XX8_VOLAIN4				0x14	/* Volume Control AIN4 */
#define CS42XX8_VOLAIN5				0x15	/* Volume Control AIN5 */
#define CS42XX8_VOLAIN6				0x16	/* Volume Control AIN6 */
#define CS42XX8_ADCINV				0x17	/* ADC Channel Invert */
#define CS42XX8_STATUSCTL			0x18	/* Status Control */
#define CS42XX8_STATUS				0x19	/* Status */
#define CS42XX8_STATUSM				0x1A	/* Status Mask */
#define CS42XX8_MUTEC				0x1B	/* MUTEC Pin Control */

#define CS42XX8_FIRSTREG			CS42XX8_CHIPID
#define CS42XX8_LASTREG				CS42XX8_MUTEC
#define CS42XX8_NUMREGS				(CS42XX8_LASTREG - CS42XX8_FIRSTREG + 1)
#define CS42XX8_I2C_INCR			0x80

/* Chip I.D. and Revision Register (Address 01h) */
#define CS42XX8_CHIPID_CHIP_ID_MASK		0xF0
#define CS42XX8_CHIPID_REV_ID_MASK		0x0F

/* Power Control (Address 02h) */
#define CS42XX8_PWRCTL_PDN_ADC3_SHIFT		7
#define CS42XX8_PWRCTL_PDN_ADC3_MASK		(1 << CS42XX8_PWRCTL_PDN_ADC3_SHIFT)
#define CS42XX8_PWRCTL_PDN_ADC3			(1 << CS42XX8_PWRCTL_PDN_ADC3_SHIFT)
#define CS42XX8_PWRCTL_PDN_ADC2_SHIFT		6
#define CS42XX8_PWRCTL_PDN_ADC2_MASK		(1 << CS42XX8_PWRCTL_PDN_ADC2_SHIFT)
#define CS42XX8_PWRCTL_PDN_ADC2			(1 << CS42XX8_PWRCTL_PDN_ADC2_SHIFT)
#define CS42XX8_PWRCTL_PDN_ADC1_SHIFT		5
#define CS42XX8_PWRCTL_PDN_ADC1_MASK		(1 << CS42XX8_PWRCTL_PDN_ADC1_SHIFT)
#define CS42XX8_PWRCTL_PDN_ADC1			(1 << CS42XX8_PWRCTL_PDN_ADC1_SHIFT)
#define CS42XX8_PWRCTL_PDN_DAC4_SHIFT		4
#define CS42XX8_PWRCTL_PDN_DAC4_MASK		(1 << CS42XX8_PWRCTL_PDN_DAC4_SHIFT)
#define CS42XX8_PWRCTL_PDN_DAC4			(1 << CS42XX8_PWRCTL_PDN_DAC4_SHIFT)
#define CS42XX8_PWRCTL_PDN_DAC3_SHIFT		3
#define CS42XX8_PWRCTL_PDN_DAC3_MASK		(1 << CS42XX8_PWRCTL_PDN_DAC3_SHIFT)
#define CS42XX8_PWRCTL_PDN_DAC3			(1 << CS42XX8_PWRCTL_PDN_DAC3_SHIFT)
#define CS42XX8_PWRCTL_PDN_DAC2_SHIFT		2
#define CS42XX8_PWRCTL_PDN_DAC2_MASK		(1 << CS42XX8_PWRCTL_PDN_DAC2_SHIFT)
#define CS42XX8_PWRCTL_PDN_DAC2			(1 << CS42XX8_PWRCTL_PDN_DAC2_SHIFT)
#define CS42XX8_PWRCTL_PDN_DAC1_SHIFT		1
#define CS42XX8_PWRCTL_PDN_DAC1_MASK		(1 << CS42XX8_PWRCTL_PDN_DAC1_SHIFT)
#define CS42XX8_PWRCTL_PDN_DAC1			(1 << CS42XX8_PWRCTL_PDN_DAC1_SHIFT)
#define CS42XX8_PWRCTL_PDN_SHIFT		0
#define CS42XX8_PWRCTL_PDN_MASK			(1 << CS42XX8_PWRCTL_PDN_SHIFT)
#define CS42XX8_PWRCTL_PDN			(1 << CS42XX8_PWRCTL_PDN_SHIFT)

/* Functional Mode (Address 03h) */
#define CS42XX8_FUNCMOD_DAC_FM_SHIFT		6
#define CS42XX8_FUNCMOD_DAC_FM_WIDTH		2
#define CS42XX8_FUNCMOD_DAC_FM_MASK		(((1 << CS42XX8_FUNCMOD_DAC_FM_WIDTH) - 1) << CS42XX8_FUNCMOD_DAC_FM_SHIFT)
#define CS42XX8_FUNCMOD_DAC_FM(v)		((v) << CS42XX8_FUNCMOD_DAC_FM_SHIFT)
#define CS42XX8_FUNCMOD_ADC_FM_SHIFT		4
#define CS42XX8_FUNCMOD_ADC_FM_WIDTH		2
#define CS42XX8_FUNCMOD_ADC_FM_MASK		(((1 << CS42XX8_FUNCMOD_ADC_FM_WIDTH) - 1) << CS42XX8_FUNCMOD_ADC_FM_SHIFT)
#define CS42XX8_FUNCMOD_ADC_FM(v)		((v) << CS42XX8_FUNCMOD_ADC_FM_SHIFT)
#define CS42XX8_FUNCMOD_xC_FM_MASK(x)		((x) ? CS42XX8_FUNCMOD_DAC_FM_MASK : CS42XX8_FUNCMOD_ADC_FM_MASK)
#define CS42XX8_FUNCMOD_xC_FM(x, v)		((x) ? CS42XX8_FUNCMOD_DAC_FM(v) : CS42XX8_FUNCMOD_ADC_FM(v))
#define CS42XX8_FUNCMOD_MFREQ_SHIFT		1
#define CS42XX8_FUNCMOD_MFREQ_WIDTH		3
#define CS42XX8_FUNCMOD_MFREQ_MASK		(((1 << CS42XX8_FUNCMOD_MFREQ_WIDTH) - 1) << CS42XX8_FUNCMOD_MFREQ_SHIFT)
#define CS42XX8_FUNCMOD_MFREQ_256(s)		((0 << CS42XX8_FUNCMOD_MFREQ_SHIFT) >> (s >> 1))

Annotation

Implementation Notes