sound/soc/codecs/cs43130.c
Source file repositories/reference/linux-study-clean/sound/soc/codecs/cs43130.c
File Facts
- System
- Linux kernel
- Corpus path
sound/soc/codecs/cs43130.c- Extension
.c- Size
- 75762 bytes
- Lines
- 2782
- Domain
- Driver Families
- Bucket
- sound/soc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/moduleparam.hlinux/kernel.hlinux/init.hlinux/delay.hlinux/gpio/consumer.hlinux/platform_device.hlinux/pm.hlinux/i2c.hlinux/property.hlinux/regmap.hlinux/slab.hsound/core.hsound/pcm.hsound/pcm_params.hsound/soc.hsound/soc-dapm.hsound/initval.hsound/tlv.hlinux/regulator/consumer.hlinux/pm_runtime.hlinux/completion.hlinux/mutex.hlinux/workqueue.hsound/jack.hcs43130.hcirrus_legacy.h
Detected Declarations
struct cs43130_pll_paramsstruct reg_sequencesfunction cs43130_volatile_registerfunction cs43130_readable_registerfunction cs43130_precious_registerfunction cs43130_pll_configfunction cs43130_set_pllfunction cs43130_wait_for_completionfunction cs43130_change_clksrcfunction cs43130_set_bitwidthfunction cs43130_set_sp_fmtfunction cs43130_pcm_dsd_mixfunction cs43130_dsd_hw_paramsfunction cs43130_hw_paramsfunction cs43130_hw_freefunction cs43130_pcm_ch_getfunction cs43130_pcm_ch_putfunction cs43130_dsd_eventfunction cs43130_pcm_eventfunction cs43130_dac_eventfunction cs43130_hpin_eventfunction cs43130_pcm_startupfunction cs43130_dop_startupfunction cs43130_pcm_set_fmtfunction cs43130_dsd_set_fmtfunction cs43130_set_sysclkfunction cs43130_component_set_sysclkfunction cs43130_get_ac_reg_valfunction cs43130_show_dcfunction hpload_dc_l_showfunction hpload_dc_r_showfunction cs43130_show_acfunction hpload_ac_l_showfunction hpload_ac_r_showfunction cs43130_update_hploadfunction cs43130_hpload_procfunction cs43130_set_hvfunction cs43130_imp_measfunction cs43130_irq_threadfunction cs43130_probefunction cs43130_handle_device_datafunction cs43130_i2c_probefunction cs43130_i2c_removefunction cs43130_runtime_suspendfunction cs43130_runtime_resume
Annotated Snippet
struct cs43130_pll_params {
unsigned int pll_in;
u8 sclk_prediv;
u8 pll_div_int;
u32 pll_div_frac;
u8 pll_mode;
u8 pll_divout;
unsigned int pll_out;
u8 pll_cal_ratio;
};
static const struct cs43130_pll_params pll_ratio_table[] = {
{9600000, 0x02, 0x49, 0x800000, 0x00, 0x08, 22579200, 151},
{9600000, 0x02, 0x50, 0x000000, 0x00, 0x08, 24576000, 164},
{11289600, 0x02, 0X40, 0, 0x01, 0x08, 22579200, 128},
{11289600, 0x02, 0x44, 0x06F700, 0x0, 0x08, 24576000, 139},
{12000000, 0x02, 0x49, 0x800000, 0x00, 0x0A, 22579200, 120},
{12000000, 0x02, 0x40, 0x000000, 0x00, 0x08, 24576000, 131},
{12288000, 0x02, 0x49, 0x800000, 0x01, 0x0A, 22579200, 118},
{12288000, 0x02, 0x40, 0x000000, 0x01, 0x08, 24576000, 128},
{13000000, 0x02, 0x45, 0x797680, 0x01, 0x0A, 22579200, 111},
{13000000, 0x02, 0x3C, 0x7EA940, 0x01, 0x08, 24576000, 121},
{19200000, 0x03, 0x49, 0x800000, 0x00, 0x08, 22579200, 151},
{19200000, 0x03, 0x50, 0x000000, 0x00, 0x08, 24576000, 164},
{22579200, 0, 0, 0, 0, 0, 22579200, 0},
{22579200, 0x03, 0x44, 0x06F700, 0x00, 0x08, 24576000, 139},
{24000000, 0x03, 0x49, 0x800000, 0x00, 0x0A, 22579200, 120},
{24000000, 0x03, 0x40, 0x000000, 0x00, 0x08, 24576000, 131},
{24576000, 0x03, 0x49, 0x800000, 0x01, 0x0A, 22579200, 118},
{24576000, 0, 0, 0, 0, 0, 24576000, 0},
{26000000, 0x03, 0x45, 0x797680, 0x01, 0x0A, 22579200, 111},
{26000000, 0x03, 0x3C, 0x7EA940, 0x01, 0x08, 24576000, 121},
};
static const struct cs43130_pll_params *cs43130_get_pll_table(
unsigned int freq_in, unsigned int freq_out)
{
int i;
for (i = 0; i < ARRAY_SIZE(pll_ratio_table); i++) {
if (pll_ratio_table[i].pll_in == freq_in &&
pll_ratio_table[i].pll_out == freq_out)
return &pll_ratio_table[i];
}
return NULL;
}
static int cs43130_pll_config(struct snd_soc_component *component)
{
struct cs43130_private *cs43130 = snd_soc_component_get_drvdata(component);
const struct cs43130_pll_params *pll_entry;
dev_dbg(cs43130->dev, "cs43130->mclk = %u, cs43130->mclk_int = %u\n",
cs43130->mclk, cs43130->mclk_int);
pll_entry = cs43130_get_pll_table(cs43130->mclk, cs43130->mclk_int);
if (!pll_entry)
return -EINVAL;
if (pll_entry->pll_cal_ratio == 0) {
regmap_update_bits(cs43130->regmap, CS43130_PLL_SET_1,
CS43130_PLL_START_MASK, 0);
cs43130->pll_bypass = true;
return 0;
}
cs43130->pll_bypass = false;
regmap_update_bits(cs43130->regmap, CS43130_PLL_SET_2,
CS43130_PLL_DIV_DATA_MASK,
pll_entry->pll_div_frac >>
CS43130_PLL_DIV_FRAC_0_DATA_SHIFT);
regmap_update_bits(cs43130->regmap, CS43130_PLL_SET_3,
CS43130_PLL_DIV_DATA_MASK,
pll_entry->pll_div_frac >>
CS43130_PLL_DIV_FRAC_1_DATA_SHIFT);
regmap_update_bits(cs43130->regmap, CS43130_PLL_SET_4,
CS43130_PLL_DIV_DATA_MASK,
pll_entry->pll_div_frac >>
Annotation
- Immediate include surface: `linux/module.h`, `linux/moduleparam.h`, `linux/kernel.h`, `linux/init.h`, `linux/delay.h`, `linux/gpio/consumer.h`, `linux/platform_device.h`, `linux/pm.h`.
- Detected declarations: `struct cs43130_pll_params`, `struct reg_sequences`, `function cs43130_volatile_register`, `function cs43130_readable_register`, `function cs43130_precious_register`, `function cs43130_pll_config`, `function cs43130_set_pll`, `function cs43130_wait_for_completion`, `function cs43130_change_clksrc`, `function cs43130_set_bitwidth`.
- Atlas domain: Driver Families / sound/soc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.