sound/soc/codecs/cs48l32-tables.c

Source file repositories/reference/linux-study-clean/sound/soc/codecs/cs48l32-tables.c

File Facts

System
Linux kernel
Corpus path
sound/soc/codecs/cs48l32-tables.c
Extension
.c
Size
23900 bytes
Lines
539
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
//
// Regmap tables and other data for Cirrus Logic CS48L32 audio DSP.
//
// Copyright (C) 2018, 2020, 2022, 2025 Cirrus Logic, Inc. and
//               Cirrus Logic International Semiconductor Ltd.

#include <linux/array_size.h>
#include <linux/build_bug.h>
#include <linux/device.h>
#include <linux/linear_range.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <sound/cs48l32.h>
#include <sound/cs48l32_registers.h>

#include "cs48l32.h"

static const struct reg_sequence cs48l32_reva_patch[] = {
	{ 0x00001044, 0x0005000f },
	{ 0x00001c34, 0x000037e8 },
	{ 0x000046d8, 0x00000fe0 },
};

int cs48l32_apply_patch(struct cs48l32 *cs48l32)
{
	int ret;

	ret = regmap_register_patch(cs48l32->regmap, cs48l32_reva_patch,
				    ARRAY_SIZE(cs48l32_reva_patch));
	if (ret < 0)
		return dev_err_probe(cs48l32->dev, ret, "Failed to apply patch\n");

	return 0;
}

static const struct reg_default cs48l32_reg_default[] = {
	{ 0x00000c08, 0xe1000001 }, /* GPIO1_CTRL1 */
	{ 0x00000c0c, 0xe1000001 }, /* GPIO2_CTRL1 */
	{ 0x00000c10, 0xe1000001 }, /* GPIO3_CTRL1 */
	{ 0x00000c14, 0xe1000001 }, /* GPIO4_CTRL1 */
	{ 0x00000c18, 0xe1000001 }, /* GPIO5_CTRL1 */
	{ 0x00000c1c, 0xe1000001 }, /* GPIO6_CTRL1 */
	{ 0x00000c20, 0xe1000001 }, /* GPIO7_CTRL1 */
	{ 0x00000c24, 0xe1000001 }, /* GPIO8_CTRL1 */
	{ 0x00000c28, 0xe1000001 }, /* GPIO9_CTRL1 */
	{ 0x00000c2c, 0xe1000001 }, /* GPIO10_CTRL1 */
	{ 0x00000c30, 0xe1000001 }, /* GPIO11_CTRL1 */
	{ 0x00000c34, 0xe1000001 }, /* GPIO12_CTRL1 */
	{ 0x00000c38, 0xe1000001 }, /* GPIO13_CTRL1 */
	{ 0x00000c3c, 0xe1000001 }, /* GPIO14_CTRL1 */
	{ 0x00000c40, 0xe1000001 }, /* GPIO15_CTRL1 */
	{ 0x00000c44, 0xe1000001 }, /* GPIO16_CTRL1 */
	{ 0x00001020, 0x00000000 }, /* OUTPUT_SYS_CLK */
	{ 0x00001044, 0x0005000f }, /* AUXPDM_CTRL */
	{ 0x0000105c, 0x00000000 }, /* AUXPDM_CTRL2 */
	{ 0x00001400, 0x00000002 }, /* CLOCK32K */
	{ 0x00001404, 0x00000404 }, /* SYSTEM_CLOCK1 */
	{ 0x00001420, 0x00000003 }, /* SAMPLE_RATE1 */
	{ 0x00001424, 0x00000003 }, /* SAMPLE_RATE2 */
	{ 0x00001428, 0x00000003 }, /* SAMPLE_RATE3 */
	{ 0x0000142c, 0x00000003 }, /* SAMPLE_RATE4 */
	{ 0x00001c00, 0x00000002 }, /* FLL1_CONTROL1 */
	{ 0x00001c04, 0x88203004 }, /* FLL1_CONTROL2 */
	{ 0x00001c08, 0x00000000 }, /* FLL1_CONTROL3 */
	{ 0x00001c0c, 0x21f05001 }, /* FLL1_CONTROL4 */
	{ 0x00001ca0, 0x00000c04 }, /* FLL1_GPIO_CLOCK */
	{ 0x00002000, 0x00000006 }, /* CHARGE_PUMP1 */
	{ 0x00002408, 0x000003e4 }, /* LDO2_CTRL1 */
	{ 0x00002410, 0x000000e6 }, /* MICBIAS_CTRL1 */
	{ 0x00002418, 0x00000222 }, /* MICBIAS_CTRL5 */
	{ 0x00002710, 0x00004600 }, /* IRQ1_CTRL_AOD */
	{ 0x00004000, 0x00000000 }, /* INPUT_CONTROL */
	{ 0x00004008, 0x00000400 }, /* INPUT_RATE_CONTROL */
	{ 0x0000400c, 0x00000000 }, /* INPUT_CONTROL2 */
	{ 0x00004020, 0x00050020 }, /* INPUT1_CONTROL1 */
	{ 0x00004024, 0x00000000 }, /* IN1L_CONTROL1 */
	{ 0x00004028, 0x10800080 }, /* IN1L_CONTROL2 */
	{ 0x00004044, 0x00000000 }, /* IN1R_CONTROL1 */
	{ 0x00004048, 0x10800080 }, /* IN1R_CONTROL2 */
	{ 0x00004060, 0x00050020 }, /* INPUT2_CONTROL1 */
	{ 0x00004064, 0x00000000 }, /* IN2L_CONTROL1 */
	{ 0x00004068, 0x10800000 }, /* IN2L_CONTROL2 */
	{ 0x00004084, 0x00000000 }, /* IN2R_CONTROL1 */
	{ 0x00004088, 0x10800000 }, /* IN2R_CONTROL2 */
	{ 0x00004244, 0x00000002 }, /* INPUT_HPF_CONTROL */
	{ 0x00004248, 0x00000022 }, /* INPUT_VOL_CONTROL */
	{ 0x00004300, 0x00000000 }, /* AUXPDM_CONTROL1 */
	{ 0x00004304, 0x00000000 }, /* AUXPDM_CONTROL2 */
	{ 0x00004308, 0x00010008 }, /* AUXPDM1_CONTROL1 */

Annotation

Implementation Notes