sound/soc/codecs/es9356.h
Source file repositories/reference/linux-study-clean/sound/soc/codecs/es9356.h
File Facts
- System
- Linux kernel
- Corpus path
sound/soc/codecs/es9356.h- Extension
.h- Size
- 8666 bytes
- Lines
- 209
- Domain
- Driver Families
- Bucket
- sound/soc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __ES9356_H__
#define __ES9356_H__
/*ES9356 Implementation-define*/
#define ES9356_FLAGS_HP 0x2003
#define ES9356_CSM_RESET 0x2020
#define ES9356_FUC_RESET 0x2021
#define ES9356_STATE 0x2022
#define ES9356_VMID_TIME 0x2023
#define ES9356_STATE_TIME 0x2024
#define ES9356_HP_SPK_TIME 0x2025
#define ES9356_WP_ENABLE 0x2026
#define ES9356_DMIC_GPIO 0x2027
#define ES9356_ENDPOINT_MODE 0x2028
/*HP DETECT*/
#define ES9356_HP_TYPE 0x2029
#define ES9356_HP_DETECTTIME 0x202A
#define ES9356_MICBIAS_SEL 0x202B
#define ES9356_KEY_PRESS_TIME 0x202C
#define ES9356_KEY_RELEASE_TIME 0x202D
#define ES9356_KEY_HOLD_TIME 0x202E
#define ES9356_BTSEL_REF 0x202F
#define ES9356_BUTTON_CHARGE 0x2030
#define ES9356_KEYD_DETECT 0x2031
#define ES9356_DPEN_TIME 0x2032
#define ES9356_TIMER_CHECK 0x2033
#define ES9356_IBIASGEN 0x2041
#define ES9356_VMID1SEL 0x2042
#define ES9356_VMID1STL 0x2043
#define ES9356_VMID2SEL 0x2044
#define ES9356_VMID2STL 0x2045
#define ES9356_VSEL 0x2046
#define ES9356_MICBIAS_CTL 0x2047
#define ES9356_HPDETECT_CTL 0x2048
#define ES9356_MICBIAS_RES 0x2049
/*CLK*/
#define ES9356_CLK_SEL 0x2050
#define ES9356_CLK_CTL 0x2051
#define ES9356_DETCLK_CTL 0x2052
#define ES9356_CPCLK_CTL 0x2053
#define ES9356_SPKCLK_CTL 0x2054
#define ES9356_PRE_DIV_CTL 0x2055
#define ES9356_DLL_MODE 0x2056
#define ES9356_ANACLK_SEL 0x2057
#define ES9356_OSRCLK_SEL 0x2058
#define ES9356_DSPCLK_SEL 0x2059
#define ES9356_SPK9M_MODE 0x205a
/*ADC DIG CTL*/
#define ES9356_DMIC_POL 0x2061
#define ES9356_ADC_SWAP 0x2062
#define ES9356_ADC_OSR 0x2063
#define ES9356_ADC_OSRGAIN 0x2064
#define ES9356_ADC_CLEARRAM 0x2065
#define ES9356_ADC_RAMP 0x2066
#define ES9356_ADC_HPF1 0x2067
#define ES9356_ADC_HPF2 0x2068
#define ES9356_ADC_ALC 0x206C
#define ES9356_ALC_LEVEL 0x206D
#define ES9356_ALC_RAMP_WINSIZE 0x206E
/*ADC ANA CTL*/
#define ES9356_ADC_REF_EN 0x2080
#define ES9356_ADC_AMIC_CTL 0x2081
#define ES9356_ADC_ANA 0x2082
#define ES9356_PGA_CTL 0x2083
#define ES9356_ADC_INT 0x2084
#define ES9356_ADC_VCM 0x2085
#define ES9356_ADC_VRPBIAS 0x2086
#define ES9356_ADC_LP 0x2087
/*DAC DIG CTL*/
#define ES9356_DAC_FSMODE 0x2090
#define ES9356_DAC_OSR 0x2091
#define ES9356_DAC_INV 0x2092
#define ES9356_DAC_RAMP 0x2093
#define ES9356_DAC_VPPSCALE 0x2094
#define ES9356_DAC_SWAP 0x2097
#define ES9356_SPKCMP_VPPSC 0x20A0
#define ES9356_CALIBRATION_TIME 0x20A1
#define ES9356_CALIBRATION_SETTING 0x20A2
#define ES9356_DAC_OFFSET_LH 0x20A3
#define ES9356_DAC_OFFSET_LL 0x20A4
#define ES9356_DAC_OFFSET_RH 0x20A5
#define ES9356_DAC_OFFSET_RL 0x20A6
/*DAC ANA CTL*/
Annotation
- Atlas domain: Driver Families / sound/soc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.