sound/soc/codecs/lpass-tx-macro.c

Source file repositories/reference/linux-study-clean/sound/soc/codecs/lpass-tx-macro.c

File Facts

System
Linux kernel
Corpus path
sound/soc/codecs/lpass-tx-macro.c
Extension
.c
Size
85577 bytes
Lines
2544
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct tx_mute_work {
	struct tx_macro *tx;
	u8 decimator;
	struct delayed_work dwork;
};

struct hpf_work {
	struct tx_macro *tx;
	u8 decimator;
	u8 hpf_cut_off_freq;
	struct delayed_work dwork;
};

struct tx_macro_data {
	unsigned int flags;
	unsigned int ver;
	const struct snd_soc_dapm_widget *extra_widgets;
	size_t extra_widgets_num;
	const struct snd_soc_dapm_route *extra_routes;
	size_t extra_routes_num;
};

struct tx_macro {
	struct device *dev;
	const struct tx_macro_data *data;
	struct snd_soc_component *component;
	struct hpf_work tx_hpf_work[NUM_DECIMATORS];
	struct tx_mute_work tx_mute_dwork[NUM_DECIMATORS];
	unsigned long active_ch_mask[TX_MACRO_MAX_DAIS];
	unsigned long active_ch_cnt[TX_MACRO_MAX_DAIS];
	int active_decimator[TX_MACRO_MAX_DAIS];
	struct regmap *regmap;
	struct clk *mclk;
	struct clk *npl;
	struct clk *macro;
	struct clk *dcodec;
	struct clk *fsgen;
	struct clk_hw hw;
	bool dec_active[NUM_DECIMATORS];
	int tx_mclk_users;
	bool bcs_enable;
	int dec_mode[NUM_DECIMATORS];
	struct lpass_macro *pds;
	bool bcs_clk_en;
};
#define to_tx_macro(_hw) container_of(_hw, struct tx_macro, hw)

static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);

static struct reg_default tx_defaults[] = {
	/* TX Macro */
	{ CDC_TX_CLK_RST_CTRL_MCLK_CONTROL, 0x00 },
	{ CDC_TX_CLK_RST_CTRL_FS_CNT_CONTROL, 0x00 },
	{ CDC_TX_CLK_RST_CTRL_SWR_CONTROL, 0x00},
	{ CDC_TX_TOP_CSR_TOP_CFG0, 0x00},
	{ CDC_TX_TOP_CSR_ANC_CFG, 0x00},
	{ CDC_TX_TOP_CSR_SWR_CTRL, 0x00},
	{ CDC_TX_TOP_CSR_FREQ_MCLK, 0x00},
	{ CDC_TX_TOP_CSR_DEBUG_BUS, 0x00},
	{ CDC_TX_TOP_CSR_DEBUG_EN, 0x00},
	{ CDC_TX_TOP_CSR_TX_I2S_CTL, 0x0C},
	{ CDC_TX_TOP_CSR_I2S_CLK, 0x00},
	{ CDC_TX_TOP_CSR_I2S_RESET, 0x00},
	{ CDC_TX_TOP_CSR_SWR_DMIC0_CTL, 0x00},
	{ CDC_TX_TOP_CSR_SWR_DMIC1_CTL, 0x00},
	{ CDC_TX_TOP_CSR_SWR_DMIC2_CTL, 0x00},
	{ CDC_TX_TOP_CSR_SWR_DMIC3_CTL, 0x00},
	{ CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0x00},
	{ CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX0_CFG0, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX0_CFG1, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX1_CFG0, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX1_CFG1, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX2_CFG0, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX2_CFG1, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX3_CFG0, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX3_CFG1, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX4_CFG0, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX4_CFG1, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX5_CFG0, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX5_CFG1, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX6_CFG0, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX6_CFG1, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX7_CFG0, 0x00},
	{ CDC_TX_INP_MUX_ADC_MUX7_CFG1, 0x00},
	{ CDC_TX_ANC0_CLK_RESET_CTL, 0x00},
	{ CDC_TX_ANC0_MODE_1_CTL, 0x00},
	{ CDC_TX_ANC0_MODE_2_CTL, 0x00},
	{ CDC_TX_ANC0_FF_SHIFT, 0x00},
	{ CDC_TX_ANC0_FB_SHIFT, 0x00},

Annotation

Implementation Notes