sound/soc/codecs/max98088.c

Source file repositories/reference/linux-study-clean/sound/soc/codecs/max98088.c

File Facts

System
Linux kernel
Corpus path
sound/soc/codecs/max98088.c
Extension
.c
Size
64396 bytes
Lines
1781
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct max98088_cdata {
       unsigned int rate;
       unsigned int fmt;
       int eq_sel;
};

struct max98088_priv {
	struct regmap *regmap;
	enum max98088_type devtype;
	struct max98088_pdata *pdata;
	struct clk *mclk;
	unsigned char mclk_prescaler;
	unsigned int sysclk;
	struct max98088_cdata dai[2];
	int eq_textcnt;
	const char **eq_texts;
	struct soc_enum eq_enum;
	u8 ina_state;
	u8 inb_state;
	unsigned int ex_mode;
	unsigned int digmic;
	unsigned int mic1pre;
	unsigned int mic2pre;
	unsigned int extmic_mode;
};

static const struct reg_default max98088_reg[] = {
	{  0xf, 0x00 }, /* 0F interrupt enable */

	{ 0x10, 0x00 }, /* 10 master clock */
	{ 0x11, 0x00 }, /* 11 DAI1 clock mode */
	{ 0x12, 0x00 }, /* 12 DAI1 clock control */
	{ 0x13, 0x00 }, /* 13 DAI1 clock control */
	{ 0x14, 0x00 }, /* 14 DAI1 format */
	{ 0x15, 0x00 }, /* 15 DAI1 clock */
	{ 0x16, 0x00 }, /* 16 DAI1 config */
	{ 0x17, 0x00 }, /* 17 DAI1 TDM */
	{ 0x18, 0x00 }, /* 18 DAI1 filters */
	{ 0x19, 0x00 }, /* 19 DAI2 clock mode */
	{ 0x1a, 0x00 }, /* 1A DAI2 clock control */
	{ 0x1b, 0x00 }, /* 1B DAI2 clock control */
	{ 0x1c, 0x00 }, /* 1C DAI2 format */
	{ 0x1d, 0x00 }, /* 1D DAI2 clock */
	{ 0x1e, 0x00 }, /* 1E DAI2 config */
	{ 0x1f, 0x00 }, /* 1F DAI2 TDM */

	{ 0x20, 0x00 }, /* 20 DAI2 filters */
	{ 0x21, 0x00 }, /* 21 data config */
	{ 0x22, 0x00 }, /* 22 DAC mixer */
	{ 0x23, 0x00 }, /* 23 left ADC mixer */
	{ 0x24, 0x00 }, /* 24 right ADC mixer */
	{ 0x25, 0x00 }, /* 25 left HP mixer */
	{ 0x26, 0x00 }, /* 26 right HP mixer */
	{ 0x27, 0x00 }, /* 27 HP control */
	{ 0x28, 0x00 }, /* 28 left REC mixer */
	{ 0x29, 0x00 }, /* 29 right REC mixer */
	{ 0x2a, 0x00 }, /* 2A REC control */
	{ 0x2b, 0x00 }, /* 2B left SPK mixer */
	{ 0x2c, 0x00 }, /* 2C right SPK mixer */
	{ 0x2d, 0x00 }, /* 2D SPK control */
	{ 0x2e, 0x00 }, /* 2E sidetone */
	{ 0x2f, 0x00 }, /* 2F DAI1 playback level */

	{ 0x30, 0x00 }, /* 30 DAI1 playback level */
	{ 0x31, 0x00 }, /* 31 DAI2 playback level */
	{ 0x32, 0x00 }, /* 32 DAI2 playbakc level */
	{ 0x33, 0x00 }, /* 33 left ADC level */
	{ 0x34, 0x00 }, /* 34 right ADC level */
	{ 0x35, 0x00 }, /* 35 MIC1 level */
	{ 0x36, 0x00 }, /* 36 MIC2 level */
	{ 0x37, 0x00 }, /* 37 INA level */
	{ 0x38, 0x00 }, /* 38 INB level */
	{ 0x39, 0x00 }, /* 39 left HP volume */
	{ 0x3a, 0x00 }, /* 3A right HP volume */
	{ 0x3b, 0x00 }, /* 3B left REC volume */
	{ 0x3c, 0x00 }, /* 3C right REC volume */
	{ 0x3d, 0x00 }, /* 3D left SPK volume */
	{ 0x3e, 0x00 }, /* 3E right SPK volume */
	{ 0x3f, 0x00 }, /* 3F MIC config */

	{ 0x40, 0x00 }, /* 40 MIC threshold */
	{ 0x41, 0x00 }, /* 41 excursion limiter filter */
	{ 0x42, 0x00 }, /* 42 excursion limiter threshold */
	{ 0x43, 0x00 }, /* 43 ALC */
	{ 0x44, 0x00 }, /* 44 power limiter threshold */
	{ 0x45, 0x00 }, /* 45 power limiter config */
	{ 0x46, 0x00 }, /* 46 distortion limiter config */
	{ 0x47, 0x00 }, /* 47 audio input */
        { 0x48, 0x00 }, /* 48 microphone */
	{ 0x49, 0x00 }, /* 49 level control */

Annotation

Implementation Notes