sound/soc/codecs/rt1318.h

Source file repositories/reference/linux-study-clean/sound/soc/codecs/rt1318.h

File Facts

System
Linux kernel
Corpus path
sound/soc/codecs/rt1318.h
Extension
.h
Size
10847 bytes
Lines
343
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct rt1318_priv {
	struct snd_soc_component *component;
	struct rt1318_platform_data pdata;
	struct work_struct cali_work;
	struct regmap *regmap;

	unsigned int r0_l_integer;
	unsigned int r0_l_factor;
	unsigned int r0_r_integer;
	unsigned int r0_r_factor;
	int rt1318_init;
	int rt1318_dvol;
	int sysclk_src;
	int sysclk;
	int lrck;
	int bclk;
	int master;
	int pll_src;
	int pll_in;
	int pll_out;
};

#define RT1318_PLL_INP_MAX	40000000
#define RT1318_PLL_INP_MIN	256000
#define RT1318_PLL_N_MAX	0x1ff
#define RT1318_PLL_K_MAX	0x1f
#define RT1318_PLL_M_MAX	0x1f

#define RT1318_LRCLK_192000 192000
#define RT1318_LRCLK_96000 96000
#define RT1318_LRCLK_48000 48000
#define RT1318_LRCLK_44100 44100
#define RT1318_LRCLK_16000 16000
#define RT1318_DVOL_STEP 383

#define RT1318_CLK1				0xc001
#define RT1318_CLK2				0xc003
#define RT1318_CLK3				0xc004
#define RT1318_CLK4				0xc005
#define RT1318_CLK5				0xc006
#define RT1318_CLK6				0xc007
#define RT1318_CLK7				0xc008
#define RT1318_PWR_STA1				0xc121
#define RT1318_SPK_VOL_TH			0xc130
#define RT1318_TCON				0xc203
#define RT1318_SRC_TCON				0xc204
#define RT1318_TCON_RELATE			0xc206
#define RT1318_DA_VOL_L_8			0xc20b
#define RT1318_DA_VOL_L_1_7			0xc20c
#define RT1318_DA_VOL_R_8			0xc20d
#define RT1318_DA_VOL_R_1_7			0xc20e
#define RT1318_FEEDBACK_PATH			0xc321
#define RT1318_STP_TEMP_L			0xdb00
#define RT1318_STP_SEL_L			0xdb08
#define RT1318_STP_R0_EN_L			0xdb12
#define RT1318_R0_CMP_L_FLAG			0xdb35
#define RT1318_PRE_R0_L_24			0xdbb5
#define RT1318_PRE_R0_L_23_16			0xdbb6
#define RT1318_PRE_R0_L_15_8			0xdbb7
#define RT1318_PRE_R0_L_7_0			0xdbb8
#define RT1318_R0_L_24				0xdbc5
#define RT1318_R0_L_23_16			0xdbc6
#define RT1318_R0_L_15_8			0xdbc7
#define RT1318_R0_L_7_0				0xdbc8
#define RT1318_STP_SEL_R			0xdd08
#define RT1318_STP_R0_EN_R			0xdd12
#define RT1318_R0_CMP_R_FLAG			0xdd35
#define RT1318_PRE_R0_R_24			0xddb5
#define RT1318_PRE_R0_R_23_16			0xddb6
#define RT1318_PRE_R0_R_15_8			0xddb7
#define RT1318_PRE_R0_R_7_0			0xddb8
#define RT1318_R0_R_24				0xddc5
#define RT1318_R0_R_23_16			0xddc6
#define RT1318_R0_R_15_8			0xddc7
#define RT1318_R0_R_7_0				0xddc8
#define RT1318_DEV_ID1				0xf012
#define RT1318_DEV_ID2				0xf013
#define RT1318_PLL1_K				0xf20d
#define RT1318_PLL1_M				0xf20f
#define RT1318_PLL1_N_8				0xf211
#define RT1318_PLL1_N_7_0			0xf212
#define RT1318_SINE_GEN0			0xf800
#define RT1318_TDM_CTRL1			0xf900
#define RT1318_TDM_CTRL2			0xf901
#define RT1318_TDM_CTRL3			0xf902
#define RT1318_TDM_CTRL9			0xf908


/* Clock-1  (0xC001) */
#define RT1318_PLLIN_MASK			(0x7 << 4)

Annotation

Implementation Notes