sound/soc/codecs/tscs454.h

Source file repositories/reference/linux-study-clean/sound/soc/codecs/tscs454.h

File Facts

System: Linux kernel
Corpus path: sound/soc/codecs/tscs454.h
Extension: .h
Size: 105641 bytes
Lines: 2324
Domain: Driver Families
Bucket: sound/soc
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Touches IRQ or DMA behavior; this matters for the representative real-device path.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
// tscs454.h -- TSCS454 ALSA SoC Audio driver
// Copyright 2018 Tempo Semiconductor, Inc.
// Author: Steven Eckhoff <steven.eckhoff.opensource@gmail.com>

#ifndef __REDWOODPUBLIC_H__
#define __REDWOODPUBLIC_H__

#define VIRT_BASE 0x00
#define PAGE_LEN 0x100
#define VIRT_PAGE_BASE(page) (VIRT_BASE + (PAGE_LEN * page))
#define VIRT_ADDR(page, address) (VIRT_PAGE_BASE(page) + address)
#define ADDR(page, virt_address) (virt_address - VIRT_PAGE_BASE(page))

#define R_PAGESEL                       0x0
#define R_RESET                         VIRT_ADDR(0x0, 0x1)
#define R_IRQEN                         VIRT_ADDR(0x0, 0x2)
#define R_IRQMASK                       VIRT_ADDR(0x0, 0x3)
#define R_IRQSTAT                       VIRT_ADDR(0x0, 0x4)
#define R_DEVADD0                       VIRT_ADDR(0x0, 0x6)
#define R_DEVID                         VIRT_ADDR(0x0, 0x8)
#define R_DEVREV                        VIRT_ADDR(0x0, 0x9)
#define R_PLLSTAT                       VIRT_ADDR(0x0, 0x0A)
#define R_PLL1CTL                       VIRT_ADDR(0x0, 0x0B)
#define R_PLL1RDIV                      VIRT_ADDR(0x0, 0x0C)
#define R_PLL1ODIV                      VIRT_ADDR(0x0, 0x0D)
#define R_PLL1FDIVL                     VIRT_ADDR(0x0, 0x0E)
#define R_PLL1FDIVH                     VIRT_ADDR(0x0, 0x0F)
#define R_PLL2CTL                       VIRT_ADDR(0x0, 0x10)
#define R_PLL2RDIV                      VIRT_ADDR(0x0, 0x11)
#define R_PLL2ODIV                      VIRT_ADDR(0x0, 0x12)
#define R_PLL2FDIVL                     VIRT_ADDR(0x0, 0x13)
#define R_PLL2FDIVH                     VIRT_ADDR(0x0, 0x14)
#define R_PLLCTL                        VIRT_ADDR(0x0, 0x15)
#define R_ISRC                          VIRT_ADDR(0x0, 0x16)
#define R_SCLKCTL                       VIRT_ADDR(0x0, 0x18)
#define R_TIMEBASE                      VIRT_ADDR(0x0, 0x19)
#define R_I2SP1CTL                      VIRT_ADDR(0x0, 0x1A)
#define R_I2SP2CTL                      VIRT_ADDR(0x0, 0x1B)
#define R_I2SP3CTL                      VIRT_ADDR(0x0, 0x1C)
#define R_I2S1MRATE                     VIRT_ADDR(0x0, 0x1D)
#define R_I2S2MRATE                     VIRT_ADDR(0x0, 0x1E)
#define R_I2S3MRATE                     VIRT_ADDR(0x0, 0x1F)
#define R_I2SCMC                        VIRT_ADDR(0x0, 0x20)
#define R_MCLK2PINC                     VIRT_ADDR(0x0, 0x21)
#define R_I2SPINC0                      VIRT_ADDR(0x0, 0x22)
#define R_I2SPINC1                      VIRT_ADDR(0x0, 0x23)
#define R_I2SPINC2                      VIRT_ADDR(0x0, 0x24)
#define R_GPIOCTL0                      VIRT_ADDR(0x0, 0x25)
#define R_GPIOCTL1                      VIRT_ADDR(0x0, 0x26)
#define R_ASRC                          VIRT_ADDR(0x0, 0x28)
#define R_TDMCTL0                       VIRT_ADDR(0x0, 0x2D)
#define R_TDMCTL1                       VIRT_ADDR(0x0, 0x2E)
#define R_PCMP2CTL0                     VIRT_ADDR(0x0, 0x2F)
#define R_PCMP2CTL1                     VIRT_ADDR(0x0, 0x30)
#define R_PCMP3CTL0                     VIRT_ADDR(0x0, 0x31)
#define R_PCMP3CTL1                     VIRT_ADDR(0x0, 0x32)
#define R_PWRM0                         VIRT_ADDR(0x0, 0x33)
#define R_PWRM1                         VIRT_ADDR(0x0, 0x34)
#define R_PWRM2                         VIRT_ADDR(0x0, 0x35)
#define R_PWRM3                         VIRT_ADDR(0x0, 0x36)
#define R_PWRM4                         VIRT_ADDR(0x0, 0x37)
#define R_I2SIDCTL                      VIRT_ADDR(0x0, 0x38)
#define R_I2SODCTL                      VIRT_ADDR(0x0, 0x39)
#define R_AUDIOMUX1                     VIRT_ADDR(0x0, 0x3A)
#define R_AUDIOMUX2                     VIRT_ADDR(0x0, 0x3B)
#define R_AUDIOMUX3                     VIRT_ADDR(0x0, 0x3C)
#define R_HSDCTL1                       VIRT_ADDR(0x1, 0x1)
#define R_HSDCTL2                       VIRT_ADDR(0x1, 0x2)
#define R_HSDSTAT                       VIRT_ADDR(0x1, 0x3)
#define R_HSDDELAY                      VIRT_ADDR(0x1, 0x4)
#define R_BUTCTL                        VIRT_ADDR(0x1, 0x5)
#define R_CH0AIC                        VIRT_ADDR(0x1, 0x6)
#define R_CH1AIC                        VIRT_ADDR(0x1, 0x7)
#define R_CH2AIC                        VIRT_ADDR(0x1, 0x8)
#define R_CH3AIC                        VIRT_ADDR(0x1, 0x9)
#define R_ICTL0                         VIRT_ADDR(0x1, 0x0A)
#define R_ICTL1                         VIRT_ADDR(0x1, 0x0B)
#define R_MICBIAS                       VIRT_ADDR(0x1, 0x0C)
#define R_PGACTL0                       VIRT_ADDR(0x1, 0x0D)
#define R_PGACTL1                       VIRT_ADDR(0x1, 0x0E)
#define R_PGACTL2                       VIRT_ADDR(0x1, 0x0F)
#define R_PGACTL3                       VIRT_ADDR(0x1, 0x10)
#define R_PGAZ                          VIRT_ADDR(0x1, 0x11)
#define R_ICH0VOL                       VIRT_ADDR(0x1, 0x12)
#define R_ICH1VOL                       VIRT_ADDR(0x1, 0x13)
#define R_ICH2VOL                       VIRT_ADDR(0x1, 0x14)
#define R_ICH3VOL                       VIRT_ADDR(0x1, 0x15)
#define R_ASRCILVOL                     VIRT_ADDR(0x1, 0x16)
#define R_ASRCIRVOL                     VIRT_ADDR(0x1, 0x17)

Annotation

Atlas domain: Driver Families / sound/soc.
Implementation status: source implementation candidate.
IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.