sound/soc/codecs/wm8961.h

Source file repositories/reference/linux-study-clean/sound/soc/codecs/wm8961.h

File Facts

System: Linux kernel
Corpus path: sound/soc/codecs/wm8961.h
Extension: .h
Size: 46304 bytes
Lines: 861
Domain: Driver Families
Bucket: sound/soc
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

sound/soc.h

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _WM8961_H
#define _WM8961_H

#include <sound/soc.h>

#define WM8961_BCLK  1
#define WM8961_LRCLK 2

#define WM8961_BCLK_DIV_1    0
#define WM8961_BCLK_DIV_1_5  1
#define WM8961_BCLK_DIV_2    2
#define WM8961_BCLK_DIV_3    3
#define WM8961_BCLK_DIV_4    4
#define WM8961_BCLK_DIV_5_5  5
#define WM8961_BCLK_DIV_6    6
#define WM8961_BCLK_DIV_8    7
#define WM8961_BCLK_DIV_11   8
#define WM8961_BCLK_DIV_12   9
#define WM8961_BCLK_DIV_16  10
#define WM8961_BCLK_DIV_24  11
#define WM8961_BCLK_DIV_32  13


/*
 * Register values.
 */
#define WM8961_LEFT_INPUT_VOLUME                0x00
#define WM8961_RIGHT_INPUT_VOLUME               0x01
#define WM8961_LOUT1_VOLUME                     0x02
#define WM8961_ROUT1_VOLUME                     0x03
#define WM8961_CLOCKING1                        0x04
#define WM8961_ADC_DAC_CONTROL_1                0x05
#define WM8961_ADC_DAC_CONTROL_2                0x06
#define WM8961_AUDIO_INTERFACE_0                0x07
#define WM8961_CLOCKING2                        0x08
#define WM8961_AUDIO_INTERFACE_1                0x09
#define WM8961_LEFT_DAC_VOLUME                  0x0A
#define WM8961_RIGHT_DAC_VOLUME                 0x0B
#define WM8961_AUDIO_INTERFACE_2                0x0E
#define WM8961_SOFTWARE_RESET                   0x0F
#define WM8961_ALC1                             0x11
#define WM8961_ALC2                             0x12
#define WM8961_ALC3                             0x13
#define WM8961_NOISE_GATE                       0x14
#define WM8961_LEFT_ADC_VOLUME                  0x15
#define WM8961_RIGHT_ADC_VOLUME                 0x16
#define WM8961_ADDITIONAL_CONTROL_1             0x17
#define WM8961_ADDITIONAL_CONTROL_2             0x18
#define WM8961_PWR_MGMT_1                       0x19
#define WM8961_PWR_MGMT_2                       0x1A
#define WM8961_ADDITIONAL_CONTROL_3             0x1B
#define WM8961_ANTI_POP                         0x1C
#define WM8961_CLOCKING_3                       0x1E
#define WM8961_ADCL_SIGNAL_PATH                 0x20
#define WM8961_ADCR_SIGNAL_PATH                 0x21
#define WM8961_LOUT2_VOLUME                     0x28
#define WM8961_ROUT2_VOLUME                     0x29
#define WM8961_PWR_MGMT_3                       0x2F
#define WM8961_ADDITIONAL_CONTROL_4             0x30
#define WM8961_CLASS_D_CONTROL_1                0x31
#define WM8961_CLASS_D_CONTROL_2                0x33
#define WM8961_CLOCKING_4                       0x38
#define WM8961_DSP_SIDETONE_0                   0x39
#define WM8961_DSP_SIDETONE_1                   0x3A
#define WM8961_DC_SERVO_0                       0x3C
#define WM8961_DC_SERVO_1                       0x3D
#define WM8961_DC_SERVO_3                       0x3F
#define WM8961_DC_SERVO_5                       0x41
#define WM8961_ANALOGUE_PGA_BIAS                0x44
#define WM8961_ANALOGUE_HP_0                    0x45
#define WM8961_ANALOGUE_HP_2                    0x47
#define WM8961_CHARGE_PUMP_1                    0x48
#define WM8961_CHARGE_PUMP_B                    0x52
#define WM8961_WRITE_SEQUENCER_1                0x57
#define WM8961_WRITE_SEQUENCER_2                0x58
#define WM8961_WRITE_SEQUENCER_3                0x59
#define WM8961_WRITE_SEQUENCER_4                0x5A
#define WM8961_WRITE_SEQUENCER_5                0x5B
#define WM8961_WRITE_SEQUENCER_6                0x5C
#define WM8961_WRITE_SEQUENCER_7                0x5D
#define WM8961_GENERAL_TEST_1                   0xFC


/*
 * Field Definitions.
 */

/*
 * R0 (0x00) - Left Input volume
 */

Annotation

Immediate include surface: `sound/soc.h`.
Atlas domain: Driver Families / sound/soc.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.