sound/soc/codecs/wm8985.h

Source file repositories/reference/linux-study-clean/sound/soc/codecs/wm8985.h

File Facts

System: Linux kernel
Corpus path: sound/soc/codecs/wm8985.h
Extension: .h
Size: 61914 bytes
Lines: 1081
Domain: Driver Families
Bucket: sound/soc
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

enum clk_src

Annotated Snippet

#ifndef _WM8985_H
#define _WM8985_H

#define WM8985_SOFTWARE_RESET                   0x00
#define WM8985_POWER_MANAGEMENT_1               0x01
#define WM8985_POWER_MANAGEMENT_2               0x02
#define WM8985_POWER_MANAGEMENT_3               0x03
#define WM8985_AUDIO_INTERFACE                  0x04
#define WM8985_COMPANDING_CONTROL               0x05
#define WM8985_CLOCK_GEN_CONTROL                0x06
#define WM8985_ADDITIONAL_CONTROL               0x07
#define WM8985_GPIO_CONTROL                     0x08
#define WM8985_JACK_DETECT_CONTROL_1            0x09
#define WM8985_DAC_CONTROL                      0x0A
#define WM8985_LEFT_DAC_DIGITAL_VOL             0x0B
#define WM8985_RIGHT_DAC_DIGITAL_VOL            0x0C
#define WM8985_JACK_DETECT_CONTROL_2            0x0D
#define WM8985_ADC_CONTROL                      0x0E
#define WM8985_LEFT_ADC_DIGITAL_VOL             0x0F
#define WM8985_RIGHT_ADC_DIGITAL_VOL            0x10
#define WM8985_EQ1_LOW_SHELF                    0x12
#define WM8985_EQ2_PEAK_1                       0x13
#define WM8985_EQ3_PEAK_2                       0x14
#define WM8985_EQ4_PEAK_3                       0x15
#define WM8985_EQ5_HIGH_SHELF                   0x16
#define WM8985_DAC_LIMITER_1                    0x18
#define WM8985_DAC_LIMITER_2                    0x19
#define WM8985_NOTCH_FILTER_1                   0x1B
#define WM8985_NOTCH_FILTER_2                   0x1C
#define WM8985_NOTCH_FILTER_3                   0x1D
#define WM8985_NOTCH_FILTER_4                   0x1E
#define WM8985_ALC_CONTROL_1                    0x20
#define WM8985_ALC_CONTROL_2                    0x21
#define WM8985_ALC_CONTROL_3                    0x22
#define WM8985_NOISE_GATE                       0x23
#define WM8985_PLL_N                            0x24
#define WM8985_PLL_K_1                          0x25
#define WM8985_PLL_K_2                          0x26
#define WM8985_PLL_K_3                          0x27
#define WM8985_3D_CONTROL                       0x29
#define WM8985_OUT4_TO_ADC                      0x2A
#define WM8985_BEEP_CONTROL                     0x2B
#define WM8985_INPUT_CTRL                       0x2C
#define WM8985_LEFT_INP_PGA_GAIN_CTRL           0x2D
#define WM8985_RIGHT_INP_PGA_GAIN_CTRL          0x2E
#define WM8985_LEFT_ADC_BOOST_CTRL              0x2F
#define WM8985_RIGHT_ADC_BOOST_CTRL             0x30
#define WM8985_OUTPUT_CTRL0                     0x31
#define WM8985_LEFT_MIXER_CTRL                  0x32
#define WM8985_RIGHT_MIXER_CTRL                 0x33
#define WM8985_LOUT1_HP_VOLUME_CTRL             0x34
#define WM8985_ROUT1_HP_VOLUME_CTRL             0x35
#define WM8985_LOUT2_SPK_VOLUME_CTRL            0x36
#define WM8985_ROUT2_SPK_VOLUME_CTRL            0x37
#define WM8985_OUT3_MIXER_CTRL                  0x38
#define WM8985_OUT4_MONO_MIX_CTRL               0x39
#define WM8985_OUTPUT_CTRL1                     0x3C
#define WM8985_BIAS_CTRL                        0x3D

#define WM8985_REGISTER_COUNT                   59
#define WM8985_MAX_REGISTER                     0x3F

/*
 * Field Definitions.
 */

/*
 * R0 (0x00) - Software Reset
 */
#define WM8985_SOFTWARE_RESET_MASK              0x01FF  /* SOFTWARE_RESET - [8:0] */
#define WM8985_SOFTWARE_RESET_SHIFT                  0  /* SOFTWARE_RESET - [8:0] */
#define WM8985_SOFTWARE_RESET_WIDTH                  9  /* SOFTWARE_RESET - [8:0] */

/*
 * R1 (0x01) - Power management 1
 */
#define WM8985_OUT4MIXEN                        0x0080  /* OUT4MIXEN */
#define WM8985_OUT4MIXEN_MASK                   0x0080  /* OUT4MIXEN */
#define WM8985_OUT4MIXEN_SHIFT                       7  /* OUT4MIXEN */
#define WM8985_OUT4MIXEN_WIDTH                       1  /* OUT4MIXEN */
#define WM8985_OUT3MIXEN                        0x0040  /* OUT3MIXEN */
#define WM8985_OUT3MIXEN_MASK                   0x0040  /* OUT3MIXEN */
#define WM8985_OUT3MIXEN_SHIFT                       6  /* OUT3MIXEN */
#define WM8985_OUT3MIXEN_WIDTH                       1  /* OUT3MIXEN */
#define WM8985_PLLEN                            0x0020  /* PLLEN */
#define WM8985_PLLEN_MASK                       0x0020  /* PLLEN */
#define WM8985_PLLEN_SHIFT                           5  /* PLLEN */
#define WM8985_PLLEN_WIDTH                           1  /* PLLEN */
#define WM8985_MICBEN                           0x0010  /* MICBEN */
#define WM8985_MICBEN_MASK                      0x0010  /* MICBEN */

Annotation

Detected declarations: `enum clk_src`.
Atlas domain: Driver Families / sound/soc.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.