sound/soc/fsl/fsl_easrc.c
Source file repositories/reference/linux-study-clean/sound/soc/fsl/fsl_easrc.c
File Facts
- System
- Linux kernel
- Corpus path
sound/soc/fsl/fsl_easrc.c- Extension
.c- Size
- 67553 bytes
- Lines
- 2426
- Domain
- Driver Families
- Bucket
- sound/soc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/atomic.hlinux/clk.hlinux/device.hlinux/dma-mapping.hlinux/firmware.hlinux/interrupt.hlinux/kobject.hlinux/kernel.hlinux/module.hlinux/miscdevice.hlinux/of.hlinux/of_address.hlinux/of_irq.hlinux/of_platform.hlinux/pm_runtime.hlinux/regmap.hlinux/sched/signal.hlinux/sysfs.hlinux/types.hlinux/gcd.hsound/dmaengine_pcm.hsound/pcm.hsound/pcm_params.hsound/soc.hsound/tlv.hsound/core.hfsl_easrc.himx-pcm.h
Detected Declarations
function fsl_easrc_iec958_put_bitsfunction fsl_easrc_iec958_get_bitsfunction fsl_easrc_iec958_infofunction fsl_easrc_get_regfunction fsl_easrc_set_regfunction fsl_easrc_set_rs_ratiofunction fsl_easrc_normalize_ratesfunction fsl_easrc_coeff_mem_ptr_resetfunction bits_taps_to_valfunction fsl_easrc_resampler_configfunction rangefunction zerofunction fsl_easrc_write_pf_coeff_memfunction fsl_easrc_prefilter_configfunction isfunction fsl_easrc_max_ch_for_slotfunction fsl_easrc_config_one_slotfunction fsl_easrc_config_slotfunction fsl_easrc_release_slotfunction fsl_easrc_config_contextfunction fsl_easrc_process_formatfunction fsl_easrc_set_ctx_formatfunction fsl_easrc_set_ctx_organziationfunction fsl_easrc_request_contextfunction fsl_easrc_release_contextfunction fsl_easrc_start_contextfunction fsl_easrc_stop_contextfunction fsl_easrc_startupfunction fsl_easrc_triggerfunction fsl_easrc_hw_paramsfunction fsl_easrc_hw_freefunction fsl_easrc_dai_probefunction fsl_easrc_dump_firmwarefunction fsl_easrc_get_firmwarefunction fsl_easrc_isrfunction fsl_easrc_get_fifo_addrfunction fsl_easrc_get_output_fifo_sizefunction fsl_easrc_m2m_preparefunction fsl_easrc_m2m_startfunction fsl_easrc_m2m_stopfunction fsl_easrc_m2m_calc_out_lenfunction fsl_easrc_m2m_get_maxburstfunction fsl_easrc_m2m_pair_suspendfunction fsl_easrc_m2m_pair_resumefunction fsl_easrc_m2m_set_ratio_modfunction fsl_easrc_m2m_get_capfunction fsl_easrc_probefunction fsl_easrc_remove
Annotated Snippet
if (ctx_id >= EASRC_CTX_MAX_NUM) {
dev_err(dev, "Invalid context id[%d]\n", ctx_id);
return -EINVAL;
}
reg = REG_EASRC_CCE1(ctx_id);
mask = EASRC_CCE1_COEF_MEM_RST_MASK;
val = EASRC_CCE1_COEF_MEM_RST;
break;
case EASRC_RS_COEFF_MEM:
/* This resets the resampling memory pointer addr */
reg = REG_EASRC_CRCC;
mask = EASRC_CRCC_RS_CPR_MASK;
val = EASRC_CRCC_RS_CPR;
break;
default:
dev_err(dev, "Unknown memory type\n");
return -EINVAL;
}
/*
* To reset the write pointer back to zero, the register field
* ASRC_CTX_CTRL_EXT1x[PF_COEFF_MEM_RST] can be toggled from
* 0x0 to 0x1 to 0x0.
*/
regmap_update_bits(easrc->regmap, reg, mask, 0);
regmap_update_bits(easrc->regmap, reg, mask, val);
regmap_update_bits(easrc->regmap, reg, mask, 0);
return 0;
}
static inline uint32_t bits_taps_to_val(unsigned int t)
{
switch (t) {
case EASRC_RS_32_TAPS:
return 32;
case EASRC_RS_64_TAPS:
return 64;
case EASRC_RS_128_TAPS:
return 128;
}
return 0;
}
static int fsl_easrc_resampler_config(struct fsl_asrc *easrc)
{
struct device *dev = &easrc->pdev->dev;
struct fsl_easrc_priv *easrc_priv = easrc->private;
struct asrc_firmware_hdr *hdr = easrc_priv->firmware_hdr;
struct interp_params *interp = easrc_priv->interp;
struct interp_params *selected_interp = NULL;
unsigned int num_coeff;
unsigned int i;
u64 *coef;
u32 *r;
int ret;
if (!hdr) {
dev_err(dev, "firmware not loaded!\n");
return -ENODEV;
}
for (i = 0; i < hdr->interp_scen; i++) {
if ((interp[i].num_taps - 1) !=
bits_taps_to_val(easrc_priv->rs_num_taps))
continue;
coef = interp[i].coeff;
selected_interp = &interp[i];
dev_dbg(dev, "Selected interp_filter: %u taps - %u phases\n",
selected_interp->num_taps,
selected_interp->num_phases);
break;
}
if (!selected_interp) {
dev_err(dev, "failed to get interpreter configuration\n");
return -EINVAL;
}
/*
* RS_LOW - first half of center tap of the sinc function
* RS_HIGH - second half of center tap of the sinc function
* This is due to the fact the resampling function must be
* symetrical - i.e. odd number of taps
*/
r = (uint32_t *)&selected_interp->center_tap;
regmap_write(easrc->regmap, REG_EASRC_RCTCL, EASRC_RCTCL_RS_CL(r[0]));
Annotation
- Immediate include surface: `linux/atomic.h`, `linux/clk.h`, `linux/device.h`, `linux/dma-mapping.h`, `linux/firmware.h`, `linux/interrupt.h`, `linux/kobject.h`, `linux/kernel.h`.
- Detected declarations: `function fsl_easrc_iec958_put_bits`, `function fsl_easrc_iec958_get_bits`, `function fsl_easrc_iec958_info`, `function fsl_easrc_get_reg`, `function fsl_easrc_set_reg`, `function fsl_easrc_set_rs_ratio`, `function fsl_easrc_normalize_rates`, `function fsl_easrc_coeff_mem_ptr_reset`, `function bits_taps_to_val`, `function fsl_easrc_resampler_config`.
- Atlas domain: Driver Families / sound/soc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.