sound/soc/fsl/fsl_esai.h

Source file repositories/reference/linux-study-clean/sound/soc/fsl/fsl_esai.h

File Facts

System
Linux kernel
Corpus path
sound/soc/fsl/fsl_esai.h
Extension
.h
Size
14918 bytes
Lines
352
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _FSL_ESAI_DAI_H
#define _FSL_ESAI_DAI_H

/* ESAI Register Map */
#define REG_ESAI_ETDR		0x00
#define REG_ESAI_ERDR		0x04
#define REG_ESAI_ECR		0x08
#define REG_ESAI_ESR		0x0C
#define REG_ESAI_TFCR		0x10
#define REG_ESAI_TFSR		0x14
#define REG_ESAI_RFCR		0x18
#define REG_ESAI_RFSR		0x1C
#define REG_ESAI_xFCR(tx)	(tx ? REG_ESAI_TFCR : REG_ESAI_RFCR)
#define REG_ESAI_xFSR(tx)	(tx ? REG_ESAI_TFSR : REG_ESAI_RFSR)
#define REG_ESAI_TX0		0x80
#define REG_ESAI_TX1		0x84
#define REG_ESAI_TX2		0x88
#define REG_ESAI_TX3		0x8C
#define REG_ESAI_TX4		0x90
#define REG_ESAI_TX5		0x94
#define REG_ESAI_TSR		0x98
#define REG_ESAI_RX0		0xA0
#define REG_ESAI_RX1		0xA4
#define REG_ESAI_RX2		0xA8
#define REG_ESAI_RX3		0xAC
#define REG_ESAI_SAISR		0xCC
#define REG_ESAI_SAICR		0xD0
#define REG_ESAI_TCR		0xD4
#define REG_ESAI_TCCR		0xD8
#define REG_ESAI_RCR		0xDC
#define REG_ESAI_RCCR		0xE0
#define REG_ESAI_xCR(tx)	(tx ? REG_ESAI_TCR : REG_ESAI_RCR)
#define REG_ESAI_xCCR(tx)	(tx ? REG_ESAI_TCCR : REG_ESAI_RCCR)
#define REG_ESAI_TSMA		0xE4
#define REG_ESAI_TSMB		0xE8
#define REG_ESAI_RSMA		0xEC
#define REG_ESAI_RSMB		0xF0
#define REG_ESAI_xSMA(tx)	(tx ? REG_ESAI_TSMA : REG_ESAI_RSMA)
#define REG_ESAI_xSMB(tx)	(tx ? REG_ESAI_TSMB : REG_ESAI_RSMB)
#define REG_ESAI_PRRC		0xF8
#define REG_ESAI_PCRC		0xFC

/* ESAI Control Register -- REG_ESAI_ECR 0x8 */
#define ESAI_ECR_ETI_SHIFT	19
#define ESAI_ECR_ETI_MASK	(1 << ESAI_ECR_ETI_SHIFT)
#define ESAI_ECR_ETI		(1 << ESAI_ECR_ETI_SHIFT)
#define ESAI_ECR_ETO_SHIFT	18
#define ESAI_ECR_ETO_MASK	(1 << ESAI_ECR_ETO_SHIFT)
#define ESAI_ECR_ETO		(1 << ESAI_ECR_ETO_SHIFT)
#define ESAI_ECR_ERI_SHIFT	17
#define ESAI_ECR_ERI_MASK	(1 << ESAI_ECR_ERI_SHIFT)
#define ESAI_ECR_ERI		(1 << ESAI_ECR_ERI_SHIFT)
#define ESAI_ECR_ERO_SHIFT	16
#define ESAI_ECR_ERO_MASK	(1 << ESAI_ECR_ERO_SHIFT)
#define ESAI_ECR_ERO		(1 << ESAI_ECR_ERO_SHIFT)
#define ESAI_ECR_ERST_SHIFT	1
#define ESAI_ECR_ERST_MASK	(1 << ESAI_ECR_ERST_SHIFT)
#define ESAI_ECR_ERST		(1 << ESAI_ECR_ERST_SHIFT)
#define ESAI_ECR_ESAIEN_SHIFT	0
#define ESAI_ECR_ESAIEN_MASK	(1 << ESAI_ECR_ESAIEN_SHIFT)
#define ESAI_ECR_ESAIEN		(1 << ESAI_ECR_ESAIEN_SHIFT)

/* ESAI Status Register -- REG_ESAI_ESR 0xC */
#define ESAI_ESR_TINIT_SHIFT	10
#define ESAI_ESR_TINIT_MASK	(1 << ESAI_ESR_TINIT_SHIFT)
#define ESAI_ESR_TINIT		(1 << ESAI_ESR_TINIT_SHIFT)
#define ESAI_ESR_RFF_SHIFT	9
#define ESAI_ESR_RFF_MASK	(1 << ESAI_ESR_RFF_SHIFT)
#define ESAI_ESR_RFF		(1 << ESAI_ESR_RFF_SHIFT)
#define ESAI_ESR_TFE_SHIFT	8
#define ESAI_ESR_TFE_MASK	(1 << ESAI_ESR_TFE_SHIFT)
#define ESAI_ESR_TFE		(1 << ESAI_ESR_TFE_SHIFT)
#define ESAI_ESR_TLS_SHIFT	7
#define ESAI_ESR_TLS_MASK	(1 << ESAI_ESR_TLS_SHIFT)
#define ESAI_ESR_TLS		(1 << ESAI_ESR_TLS_SHIFT)
#define ESAI_ESR_TDE_SHIFT	6
#define ESAI_ESR_TDE_MASK	(1 << ESAI_ESR_TDE_SHIFT)
#define ESAI_ESR_TDE		(1 << ESAI_ESR_TDE_SHIFT)
#define ESAI_ESR_TED_SHIFT	5
#define ESAI_ESR_TED_MASK	(1 << ESAI_ESR_TED_SHIFT)
#define ESAI_ESR_TED		(1 << ESAI_ESR_TED_SHIFT)
#define ESAI_ESR_TD_SHIFT	4
#define ESAI_ESR_TD_MASK	(1 << ESAI_ESR_TD_SHIFT)
#define ESAI_ESR_TD		(1 << ESAI_ESR_TD_SHIFT)
#define ESAI_ESR_RLS_SHIFT	3
#define ESAI_ESR_RLS_MASK	(1 << ESAI_ESR_RLS_SHIFT)
#define ESAI_ESR_RLS		(1 << ESAI_ESR_RLS_SHIFT)
#define ESAI_ESR_RDE_SHIFT	2
#define ESAI_ESR_RDE_MASK	(1 << ESAI_ESR_RDE_SHIFT)
#define ESAI_ESR_RDE		(1 << ESAI_ESR_RDE_SHIFT)

Annotation

Implementation Notes