sound/soc/hisilicon/hi6210-i2s.h
Source file repositories/reference/linux-study-clean/sound/soc/hisilicon/hi6210-i2s.h
File Facts
- System
- Linux kernel
- Corpus path
sound/soc/hisilicon/hi6210-i2s.h- Extension
.h- Size
- 10385 bytes
- Lines
- 266
- Domain
- Driver Families
- Bucket
- sound/soc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
enum hi6210_bitsenum hi6210_i2s_ratesenum hi6210_i2s_formatsenum hi6210_gainsenum hi6210_s2_src_modeenum hi6210_voice_dlink_src_mode
Annotated Snippet
#ifndef _HI6210_I2S_H
#define _HI6210_I2S_H
#define HII2S_SW_RST_N 0
#define HII2S_SW_RST_N__STEREO_UPLINK_WORDLEN_SHIFT 28
#define HII2S_SW_RST_N__STEREO_UPLINK_WORDLEN_MASK 3
#define HII2S_SW_RST_N__THIRDMD_UPLINK_WORDLEN_SHIFT 26
#define HII2S_SW_RST_N__THIRDMD_UPLINK_WORDLEN_MASK 3
#define HII2S_SW_RST_N__VOICE_UPLINK_WORDLEN_SHIFT 24
#define HII2S_SW_RST_N__VOICE_UPLINK_WORDLEN_MASK 3
#define HII2S_SW_RST_N__ST_DL_WORDLEN_SHIFT 20
#define HII2S_SW_RST_N__ST_DL_WORDLEN_MASK 3
#define HII2S_SW_RST_N__THIRDMD_DLINK_WORDLEN_SHIFT 18
#define HII2S_SW_RST_N__THIRDMD_DLINK_WORDLEN_MASK 3
#define HII2S_SW_RST_N__VOICE_DLINK_WORDLEN_SHIFT 16
#define HII2S_SW_RST_N__VOICE_DLINK_WORDLEN_MASK 3
#define HII2S_SW_RST_N__SW_RST_N BIT(0)
enum hi6210_bits {
HII2S_BITS_16,
HII2S_BITS_18,
HII2S_BITS_20,
HII2S_BITS_24,
};
#define HII2S_IF_CLK_EN_CFG 4
#define HII2S_IF_CLK_EN_CFG__THIRDMD_UPLINK_EN BIT(25)
#define HII2S_IF_CLK_EN_CFG__THIRDMD_DLINK_EN BIT(24)
#define HII2S_IF_CLK_EN_CFG__S3_IF_CLK_EN BIT(20)
#define HII2S_IF_CLK_EN_CFG__S2_IF_CLK_EN BIT(16)
#define HII2S_IF_CLK_EN_CFG__S2_OL_MIXER_EN BIT(15)
#define HII2S_IF_CLK_EN_CFG__S2_OL_SRC_EN BIT(14)
#define HII2S_IF_CLK_EN_CFG__S2_IR_PGA_EN BIT(13)
#define HII2S_IF_CLK_EN_CFG__S2_IL_PGA_EN BIT(12)
#define HII2S_IF_CLK_EN_CFG__S1_IR_PGA_EN BIT(10)
#define HII2S_IF_CLK_EN_CFG__S1_IL_PGA_EN BIT(9)
#define HII2S_IF_CLK_EN_CFG__S1_IF_CLK_EN BIT(8)
#define HII2S_IF_CLK_EN_CFG__VOICE_DLINK_SRC_EN BIT(7)
#define HII2S_IF_CLK_EN_CFG__VOICE_DLINK_EN BIT(6)
#define HII2S_IF_CLK_EN_CFG__ST_DL_R_EN BIT(5)
#define HII2S_IF_CLK_EN_CFG__ST_DL_L_EN BIT(4)
#define HII2S_IF_CLK_EN_CFG__VOICE_UPLINK_R_EN BIT(3)
#define HII2S_IF_CLK_EN_CFG__VOICE_UPLINK_L_EN BIT(2)
#define HII2S_IF_CLK_EN_CFG__STEREO_UPLINK_R_EN BIT(1)
#define HII2S_IF_CLK_EN_CFG__STEREO_UPLINK_L_EN BIT(0)
#define HII2S_DIG_FILTER_CLK_EN_CFG 8
#define HII2S_DIG_FILTER_CLK_EN_CFG__DACR_SDM_EN BIT(30)
#define HII2S_DIG_FILTER_CLK_EN_CFG__DACR_HBF2I_EN BIT(28)
#define HII2S_DIG_FILTER_CLK_EN_CFG__DACR_MIXER_EN BIT(25)
#define HII2S_DIG_FILTER_CLK_EN_CFG__DACR_AGC_EN BIT(24)
#define HII2S_DIG_FILTER_CLK_EN_CFG__DACL_SDM_EN BIT(22)
#define HII2S_DIG_FILTER_CLK_EN_CFG__DACL_HBF2I_EN BIT(20)
#define HII2S_DIG_FILTER_CLK_EN_CFG__DACL_MIXER_EN BIT(17)
#define HII2S_DIG_FILTER_CLK_EN_CFG__DACL_AGC_EN BIT(16)
#define HII2S_FS_CFG 0xc
#define HII2S_FS_CFG__FS_S2_SHIFT 28
#define HII2S_FS_CFG__FS_S2_MASK 7
#define HII2S_FS_CFG__FS_S1_SHIFT 24
#define HII2S_FS_CFG__FS_S1_MASK 7
#define HII2S_FS_CFG__FS_ADCLR_SHIFT 20
#define HII2S_FS_CFG__FS_ADCLR_MASK 7
#define HII2S_FS_CFG__FS_DACLR_SHIFT 16
#define HII2S_FS_CFG__FS_DACLR_MASK 7
#define HII2S_FS_CFG__FS_ST_DL_R_SHIFT 8
#define HII2S_FS_CFG__FS_ST_DL_R_MASK 7
#define HII2S_FS_CFG__FS_ST_DL_L_SHIFT 4
#define HII2S_FS_CFG__FS_ST_DL_L_MASK 7
#define HII2S_FS_CFG__FS_VOICE_DLINK_SHIFT 0
#define HII2S_FS_CFG__FS_VOICE_DLINK_MASK 7
enum hi6210_i2s_rates {
HII2S_FS_RATE_8KHZ = 0,
HII2S_FS_RATE_16KHZ = 1,
HII2S_FS_RATE_32KHZ = 2,
HII2S_FS_RATE_48KHZ = 4,
HII2S_FS_RATE_96KHZ = 5,
HII2S_FS_RATE_192KHZ = 6,
};
#define HII2S_I2S_CFG 0x10
#define HII2S_I2S_CFG__S2_IF_TX_EN BIT(31)
#define HII2S_I2S_CFG__S2_IF_RX_EN BIT(30)
Annotation
- Detected declarations: `enum hi6210_bits`, `enum hi6210_i2s_rates`, `enum hi6210_i2s_formats`, `enum hi6210_gains`, `enum hi6210_s2_src_mode`, `enum hi6210_voice_dlink_src_mode`.
- Atlas domain: Driver Families / sound/soc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.