sound/soc/intel/avs/registers.h

Source file repositories/reference/linux-study-clean/sound/soc/intel/avs/registers.h

File Facts

System
Linux kernel
Corpus path
sound/soc/intel/avs/registers.h
Extension
.h
Size
7422 bytes
Lines
185
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __SOUND_SOC_INTEL_AVS_REGS_H
#define __SOUND_SOC_INTEL_AVS_REGS_H

#include <linux/io-64-nonatomic-lo-hi.h>
#include <linux/iopoll.h>
#include <linux/sizes.h>

#define AZX_PCIREG_PGCTL		0x44
#define AZX_PCIREG_CGCTL		0x48
#define AZX_PGCTL_LSRMD_MASK		BIT(4)
#define AZX_CGCTL_MISCBDCGE_MASK	BIT(6)
#define AZX_VS_EM2_L1SEN		BIT(13)
#define AZX_VS_EM2_DUM			BIT(23)

/* Intel HD Audio General DSP Registers */
#define AVS_ADSP_GEN_BASE		0x0
#define AVS_ADSP_REG_ADSPCS		(AVS_ADSP_GEN_BASE + 0x04)
#define AVS_ADSP_REG_ADSPIC		(AVS_ADSP_GEN_BASE + 0x08)
#define AVS_ADSP_REG_ADSPIS		(AVS_ADSP_GEN_BASE + 0x0C)

#define AVS_ADSP_ADSPIC_IPC		BIT(0)
#define AVS_ADSP_ADSPIC_CLDMA		BIT(1)
#define AVS_ADSP_ADSPIS_IPC		BIT(0)
#define AVS_ADSP_ADSPIS_CLDMA		BIT(1)

#define AVS_ADSPCS_CRST_MASK(cm)	(cm)
#define AVS_ADSPCS_CSTALL_MASK(cm)	((cm) << 8)
#define AVS_ADSPCS_SPA_MASK(cm)		((cm) << 16)
#define AVS_ADSPCS_CPA_MASK(cm)		((cm) << 24)
#define AVS_ADSPCS_INTERVAL_US		500
#define AVS_ADSPCS_TIMEOUT_US		10000
#define AVS_MAIN_CORE_MASK		BIT(0)

#define AVS_ADSP_HIPCCTL_BUSY		BIT(0)
#define AVS_ADSP_HIPCCTL_DONE		BIT(1)

/* SKL Intel HD Audio Inter-Processor Communication Registers */
#define SKL_ADSP_IPC_BASE		0x40
#define SKL_ADSP_REG_HIPCT		(SKL_ADSP_IPC_BASE + 0x00)
#define SKL_ADSP_REG_HIPCTE		(SKL_ADSP_IPC_BASE + 0x04)
#define SKL_ADSP_REG_HIPCI		(SKL_ADSP_IPC_BASE + 0x08)
#define SKL_ADSP_REG_HIPCIE		(SKL_ADSP_IPC_BASE + 0x0C)
#define SKL_ADSP_REG_HIPCCTL		(SKL_ADSP_IPC_BASE + 0x10)

#define SKL_ADSP_HIPCI_BUSY		BIT(31)
#define SKL_ADSP_HIPCIE_DONE		BIT(30)
#define SKL_ADSP_HIPCT_BUSY		BIT(31)

/* CNL Intel HD Audio Inter-Processor Communication Registers */
#define CNL_ADSP_IPC_BASE               0xC0
#define CNL_ADSP_REG_HIPCTDR            (CNL_ADSP_IPC_BASE + 0x00)
#define CNL_ADSP_REG_HIPCTDA            (CNL_ADSP_IPC_BASE + 0x04)
#define CNL_ADSP_REG_HIPCTDD            (CNL_ADSP_IPC_BASE + 0x08)
#define CNL_ADSP_REG_HIPCIDR            (CNL_ADSP_IPC_BASE + 0x10)
#define CNL_ADSP_REG_HIPCIDA            (CNL_ADSP_IPC_BASE + 0x14)
#define CNL_ADSP_REG_HIPCIDD            (CNL_ADSP_IPC_BASE + 0x18)
#define CNL_ADSP_REG_HIPCCTL            (CNL_ADSP_IPC_BASE + 0x28)

#define CNL_ADSP_HIPCTDR_BUSY		BIT(31)
#define CNL_ADSP_HIPCTDA_DONE		BIT(31)
#define CNL_ADSP_HIPCIDR_BUSY		BIT(31)
#define CNL_ADSP_HIPCIDA_DONE		BIT(31)

/* MTL Intel HOST Inter-Processor Communication Registers */
#define MTL_HfIPC_BASE			0x73000
#define MTL_REG_HfIPCxTDR		(MTL_HfIPC_BASE + 0x200)
#define MTL_REG_HfIPCxTDA		(MTL_HfIPC_BASE + 0x204)
#define MTL_REG_HfIPCxIDR		(MTL_HfIPC_BASE + 0x210)
#define MTL_REG_HfIPCxIDA		(MTL_HfIPC_BASE + 0x214)
#define MTL_REG_HfIPCxCTL		(MTL_HfIPC_BASE + 0x228)
#define MTL_REG_HfIPCxTDD		(MTL_HfIPC_BASE + 0x300)
#define MTL_REG_HfIPCxIDD		(MTL_HfIPC_BASE + 0x380)

#define MTL_HfIPCxTDR_BUSY		BIT(31)
#define MTL_HfIPCxTDA_BUSY		BIT(31)
#define MTL_HfIPCxIDR_BUSY		BIT(31)
#define MTL_HfIPCxIDA_DONE		BIT(31)

#define MTL_HfFLV_BASE			0x162000
#define MTL_REG_HfFLGP(x, y)		(MTL_HfFLV_BASE + 0x1200 + (x) * 0x20 + (y) * 0x08)
#define LNL_REG_HfDFR(x)		(0x160200 + (x) * 0x8)

#define MTL_DWICTL_BASE			0x1800
#define MTL_DWICTL_REG_INTENL		(MTL_DWICTL_BASE + 0x0)
#define MTL_DWICTL_REG_FINALSTATUSL	(MTL_DWICTL_BASE + 0x30)

#define MTL_HfPMCCU_BASE		0x1D00
#define MTL_REG_HfCLKCTL		(MTL_HfPMCCU_BASE + 0x10)
#define MTL_REG_HfPWRCTL		(MTL_HfPMCCU_BASE + 0x18)
#define MTL_REG_HfPWRSTS		(MTL_HfPMCCU_BASE + 0x1C)

Annotation

Implementation Notes