sound/soc/mediatek/mt8195/mt8195-afe-pcm.c

Source file repositories/reference/linux-study-clean/sound/soc/mediatek/mt8195/mt8195-afe-pcm.c

File Facts

System
Linux kernel
Corpus path
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c
Extension
.c
Size
93748 bytes
Lines
3207
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mtk_dai_memif_priv {
	unsigned int asys_timing_sel;
};

static const struct snd_pcm_hardware mt8195_afe_hardware = {
	.info = SNDRV_PCM_INFO_MMAP |
		SNDRV_PCM_INFO_INTERLEAVED |
		SNDRV_PCM_INFO_MMAP_VALID,
	.formats = SNDRV_PCM_FMTBIT_S16_LE |
		   SNDRV_PCM_FMTBIT_S24_LE |
		   SNDRV_PCM_FMTBIT_S32_LE,
	.period_bytes_min = 64,
	.period_bytes_max = 256 * 1024,
	.periods_min = 2,
	.periods_max = 256,
	.buffer_bytes_max = 256 * 2 * 1024,
};

struct mt8195_afe_rate {
	unsigned int rate;
	unsigned int reg_value;
};

static const struct mt8195_afe_rate mt8195_afe_rates[] = {
	{ .rate = 8000, .reg_value = 0, },
	{ .rate = 12000, .reg_value = 1, },
	{ .rate = 16000, .reg_value = 2, },
	{ .rate = 24000, .reg_value = 3, },
	{ .rate = 32000, .reg_value = 4, },
	{ .rate = 48000, .reg_value = 5, },
	{ .rate = 96000, .reg_value = 6, },
	{ .rate = 192000, .reg_value = 7, },
	{ .rate = 384000, .reg_value = 8, },
	{ .rate = 7350, .reg_value = 16, },
	{ .rate = 11025, .reg_value = 17, },
	{ .rate = 14700, .reg_value = 18, },
	{ .rate = 22050, .reg_value = 19, },
	{ .rate = 29400, .reg_value = 20, },
	{ .rate = 44100, .reg_value = 21, },
	{ .rate = 88200, .reg_value = 22, },
	{ .rate = 176400, .reg_value = 23, },
	{ .rate = 352800, .reg_value = 24, },
};

int mt8195_afe_fs_timing(unsigned int rate)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(mt8195_afe_rates); i++)
		if (mt8195_afe_rates[i].rate == rate)
			return mt8195_afe_rates[i].reg_value;

	return -EINVAL;
}

static int mt8195_memif_fs(struct snd_pcm_substream *substream,
			   unsigned int rate)
{
	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
	struct snd_soc_component *component =
			snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component);
	int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
	struct mtk_base_afe_memif *memif = &afe->memif[id];
	int fs = mt8195_afe_fs_timing(rate);

	switch (memif->data->id) {
	case MT8195_AFE_MEMIF_DL10:
		fs = MT8195_ETDM_OUT3_1X_EN;
		break;
	case MT8195_AFE_MEMIF_UL8:
		fs = MT8195_ETDM_IN1_NX_EN;
		break;
	case MT8195_AFE_MEMIF_UL3:
		fs = MT8195_ETDM_IN2_NX_EN;
		break;
	default:
		break;
	}

	return fs;
}

static int mt8195_irq_fs(struct snd_pcm_substream *substream,
			 unsigned int rate)
{
	int fs = mt8195_memif_fs(substream, rate);

	switch (fs) {
	case MT8195_ETDM_IN1_NX_EN:

Annotation

Implementation Notes