sound/soc/mediatek/mt8365/mt8365-reg.h

Source file repositories/reference/linux-study-clean/sound/soc/mediatek/mt8365/mt8365-reg.h

File Facts

System
Linux kernel
Corpus path
sound/soc/mediatek/mt8365/mt8365-reg.h
Extension
.h
Size
37191 bytes
Lines
994
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _MT8365_REG_H_
#define _MT8365_REG_H_

#include <linux/bitfield.h>

#define AUDIO_TOP_CON0			(0x0000)
#define AUDIO_TOP_CON1			(0x0004)
#define AUDIO_TOP_CON2			(0x0008)
#define AUDIO_TOP_CON3			(0x000c)

#define AFE_DAC_CON0			(0x0010)
#define AFE_DAC_CON1			(0x0014)
#define AFE_I2S_CON			(0x0018)
#define AFE_CONN0			(0x0020)
#define AFE_CONN1			(0x0024)
#define AFE_CONN2			(0x0028)
#define AFE_CONN3			(0x002c)
#define AFE_CONN4			(0x0030)
#define AFE_I2S_CON1			(0x0034)
#define AFE_I2S_CON2			(0x0038)
#define AFE_MRGIF_CON			(0x003c)
#define AFE_DL1_BASE			(0x0040)
#define AFE_DL1_CUR			(0x0044)
#define AFE_DL1_END			(0x0048)
#define AFE_I2S_CON3			(0x004c)
#define AFE_DL2_BASE			(0x0050)
#define AFE_DL2_CUR			(0x0054)
#define AFE_DL2_END			(0x0058)
#define AFE_CONN5			(0x005c)
#define AFE_AWB_BASE			(0x0070)
#define AFE_AWB_END			(0x0078)
#define AFE_AWB_CUR			(0x007c)
#define AFE_VUL_BASE			(0x0080)
#define AFE_VUL_END			(0x0088)
#define AFE_VUL_CUR			(0x008c)
#define AFE_CONN6			(0x00bc)
#define AFE_MEMIF_MSB			(0x00cc)
#define AFE_MEMIF_MON0			(0x00d0)
#define AFE_MEMIF_MON1			(0x00d4)
#define AFE_MEMIF_MON2			(0x00d8)
#define AFE_MEMIF_MON3			(0x00dc)
#define AFE_MEMIF_MON4			(0x00e0)
#define AFE_MEMIF_MON5			(0x00e4)
#define AFE_MEMIF_MON6			(0x00e8)
#define AFE_MEMIF_MON7			(0x00ec)
#define AFE_MEMIF_MON8			(0x00f0)
#define AFE_MEMIF_MON9			(0x00f4)
#define AFE_MEMIF_MON10			(0x00f8)
#define AFE_MEMIF_MON11			(0x00fc)
#define AFE_ADDA_DL_SRC2_CON0		(0x0108)
#define AFE_ADDA_DL_SRC2_CON1		(0x010c)
#define AFE_ADDA_UL_SRC_CON0		(0x0114)
#define AFE_ADDA_UL_SRC_CON1		(0x0118)
#define AFE_ADDA_TOP_CON0		(0x0120)
#define AFE_ADDA_UL_DL_CON0		(0x0124)
#define AFE_ADDA_SRC_DEBUG		(0x012c)
#define AFE_ADDA_SRC_DEBUG_MON0		(0x0130)
#define AFE_ADDA_SRC_DEBUG_MON1		(0x0134)
#define AFE_ADDA_UL_SRC_MON0		(0x0148)
#define AFE_ADDA_UL_SRC_MON1		(0x014c)
#define AFE_SRAM_BOUND			(0x0170)
#define AFE_SECURE_CON			(0x0174)
#define AFE_SECURE_CONN0		(0x0178)
#define AFE_SIDETONE_DEBUG		(0x01d0)
#define AFE_SIDETONE_MON		(0x01d4)
#define AFE_SIDETONE_CON0		(0x01e0)
#define AFE_SIDETONE_COEFF		(0x01e4)
#define AFE_SIDETONE_CON1		(0x01e8)
#define AFE_SIDETONE_GAIN		(0x01ec)
#define AFE_SGEN_CON0			(0x01f0)
#define AFE_SINEGEN_CON_TDM		(0x01f8)
#define AFE_SINEGEN_CON_TDM_IN		(0x01fc)
#define AFE_TOP_CON0			(0x0200)
#define AFE_BUS_CFG			(0x0240)
#define AFE_BUS_MON0			(0x0244)
#define AFE_ADDA_PREDIS_CON0		(0x0260)
#define AFE_ADDA_PREDIS_CON1		(0x0264)
#define AFE_CONN_MON0			(0x0280)
#define AFE_CONN_MON1			(0x0284)
#define AFE_CONN_MON2			(0x0288)
#define AFE_CONN_MON3			(0x028c)
#define AFE_ADDA_IIR_COEF_02_01		(0x0290)
#define AFE_ADDA_IIR_COEF_04_03		(0x0294)
#define AFE_ADDA_IIR_COEF_06_05		(0x0298)
#define AFE_ADDA_IIR_COEF_08_07		(0x029c)
#define AFE_ADDA_IIR_COEF_10_09		(0x02a0)
#define AFE_VUL_D2_BASE			(0x0350)
#define AFE_VUL_D2_END			(0x0358)
#define AFE_VUL_D2_CUR			(0x035c)
#define AFE_HDMI_OUT_CON0		(0x0370)

Annotation

Implementation Notes