sound/soc/meson/axg-tdm-formatter.c

Source file repositories/reference/linux-study-clean/sound/soc/meson/axg-tdm-formatter.c

File Facts

System
Linux kernel
Corpus path
sound/soc/meson/axg-tdm-formatter.c
Extension
.c
Size
11111 bytes
Lines
432
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct axg_tdm_formatter {
	struct list_head list;
	struct axg_tdm_stream *stream;
	const struct axg_tdm_formatter_driver *drv;
	struct clk *pclk;
	struct clk *sclk;
	struct clk *lrclk;
	struct clk *sclk_sel;
	struct clk *lrclk_sel;
	struct reset_control *reset;
	bool enabled;
	struct regmap *map;
};

int axg_tdm_formatter_set_channel_masks(struct regmap *map,
					struct axg_tdm_stream *ts,
					unsigned int offset)
{
	unsigned int ch = ts->channels;
	u32 val[AXG_TDM_NUM_LANES];
	int i, j, k;

	/*
	 * We need to mimick the slot distribution used by the HW to keep the
	 * channel placement consistent regardless of the number of channel
	 * in the stream. This is why the odd algorithm below is used.
	 */
	memset(val, 0, sizeof(*val) * AXG_TDM_NUM_LANES);

	/*
	 * Distribute the channels of the stream over the available slots
	 * of each TDM lane. We need to go over the 32 slots ...
	 */
	for (i = 0; (i < 32) && ch; i += 2) {
		/* ... of all the lanes ... */
		for (j = 0; j < AXG_TDM_NUM_LANES; j++) {
			/* ... then distribute the channels in pairs */
			for (k = 0; k < 2; k++) {
				if ((BIT(i + k) & ts->mask[j]) && ch) {
					val[j] |= BIT(i + k);
					ch -= 1;
				}
			}
		}
	}

	/*
	 * If we still have channel left at the end of the process, it means
	 * the stream has more channels than we can accommodate and we should
	 * have caught this earlier.
	 */
	if (WARN_ON(ch != 0)) {
		pr_err("channel mask error\n");
		return -EINVAL;
	}

	for (i = 0; i < AXG_TDM_NUM_LANES; i++) {
		regmap_write(map, offset, val[i]);
		offset += regmap_get_reg_stride(map);
	}

	return 0;
}
EXPORT_SYMBOL_GPL(axg_tdm_formatter_set_channel_masks);

static int axg_tdm_formatter_enable(struct axg_tdm_formatter *formatter)
{
	struct axg_tdm_stream *ts = formatter->stream;
	bool invert;
	int ret;

	/* Do nothing if the formatter is already enabled */
	if (formatter->enabled)
		return 0;

	/*
	 * On the g12a (and possibly other SoCs), when a stream using
	 * multiple lanes is restarted, it will sometimes not start
	 * from the first lane, but randomly from another used one.
	 * The result is an unexpected and random channel shift.
	 *
	 * The hypothesis is that an HW counter is not properly reset
	 * and the formatter simply starts on the lane it stopped
	 * before. Unfortunately, there does not seems to be a way to
	 * reset this through the registers of the block.
	 *
	 * However, the g12a has indenpendent reset lines for each audio
	 * devices. Using this reset before each start solves the issue.
	 */
	ret = reset_control_reset(formatter->reset);

Annotation

Implementation Notes