sound/soc/rockchip/rockchip_i2s_tdm.h

Source file repositories/reference/linux-study-clean/sound/soc/rockchip/rockchip_i2s_tdm.h

File Facts

System
Linux kernel
Corpus path
sound/soc/rockchip/rockchip_i2s_tdm.h
Extension
.h
Size
14190 bytes
Lines
401
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _ROCKCHIP_I2S_TDM_H
#define _ROCKCHIP_I2S_TDM_H

#include <linux/hw_bitfield.h>

/*
 * TXCR
 * transmit operation control register
 */
#define I2S_TXCR_PATH_SHIFT(x)	(23 + (x) * 2)
#define I2S_TXCR_PATH_MASK(x)	(0x3 << I2S_TXCR_PATH_SHIFT(x))
#define I2S_TXCR_PATH(x, v)	((v) << I2S_TXCR_PATH_SHIFT(x))
#define I2S_TXCR_RCNT_SHIFT	17
#define I2S_TXCR_RCNT_MASK	(0x3f << I2S_TXCR_RCNT_SHIFT)
#define I2S_TXCR_CSR_SHIFT	15
#define I2S_TXCR_CSR(x)		((x) << I2S_TXCR_CSR_SHIFT)
#define I2S_TXCR_CSR_MASK	(3 << I2S_TXCR_CSR_SHIFT)
#define I2S_TXCR_HWT		BIT(14)
#define I2S_TXCR_SJM_SHIFT	12
#define I2S_TXCR_SJM_R		(0 << I2S_TXCR_SJM_SHIFT)
#define I2S_TXCR_SJM_L		(1 << I2S_TXCR_SJM_SHIFT)
#define I2S_TXCR_FBM_SHIFT	11
#define I2S_TXCR_FBM_MSB	(0 << I2S_TXCR_FBM_SHIFT)
#define I2S_TXCR_FBM_LSB	(1 << I2S_TXCR_FBM_SHIFT)
#define I2S_TXCR_IBM_SHIFT	9
#define I2S_TXCR_IBM_NORMAL	(0 << I2S_TXCR_IBM_SHIFT)
#define I2S_TXCR_IBM_LSJM	(1 << I2S_TXCR_IBM_SHIFT)
#define I2S_TXCR_IBM_RSJM	(2 << I2S_TXCR_IBM_SHIFT)
#define I2S_TXCR_IBM_MASK	(3 << I2S_TXCR_IBM_SHIFT)
#define I2S_TXCR_PBM_SHIFT	7
#define I2S_TXCR_PBM_MODE(x)	((x) << I2S_TXCR_PBM_SHIFT)
#define I2S_TXCR_PBM_MASK	(3 << I2S_TXCR_PBM_SHIFT)
#define I2S_TXCR_TFS_SHIFT	5
#define I2S_TXCR_TFS_I2S	(0 << I2S_TXCR_TFS_SHIFT)
#define I2S_TXCR_TFS_PCM	(1 << I2S_TXCR_TFS_SHIFT)
#define I2S_TXCR_TFS_TDM_PCM	(2 << I2S_TXCR_TFS_SHIFT)
#define I2S_TXCR_TFS_TDM_I2S	(3 << I2S_TXCR_TFS_SHIFT)
#define I2S_TXCR_TFS_MASK	(3 << I2S_TXCR_TFS_SHIFT)
#define I2S_TXCR_VDW_SHIFT	0
#define I2S_TXCR_VDW(x)		(((x) - 1) << I2S_TXCR_VDW_SHIFT)
#define I2S_TXCR_VDW_MASK	(0x1f << I2S_TXCR_VDW_SHIFT)

/*
 * RXCR
 * receive operation control register
 */
#define I2S_RXCR_PATH_SHIFT(x)	(17 + (x) * 2)
#define I2S_RXCR_PATH_MASK(x)	(0x3 << I2S_RXCR_PATH_SHIFT(x))
#define I2S_RXCR_PATH(x, v)	((v) << I2S_RXCR_PATH_SHIFT(x))
#define I2S_RXCR_CSR_SHIFT	15
#define I2S_RXCR_CSR(x)		((x) << I2S_RXCR_CSR_SHIFT)
#define I2S_RXCR_CSR_MASK	(3 << I2S_RXCR_CSR_SHIFT)
#define I2S_RXCR_HWT		BIT(14)
#define I2S_RXCR_SJM_SHIFT	12
#define I2S_RXCR_SJM_R		(0 << I2S_RXCR_SJM_SHIFT)
#define I2S_RXCR_SJM_L		(1 << I2S_RXCR_SJM_SHIFT)
#define I2S_RXCR_FBM_SHIFT	11
#define I2S_RXCR_FBM_MSB	(0 << I2S_RXCR_FBM_SHIFT)
#define I2S_RXCR_FBM_LSB	(1 << I2S_RXCR_FBM_SHIFT)
#define I2S_RXCR_IBM_SHIFT	9
#define I2S_RXCR_IBM_NORMAL	(0 << I2S_RXCR_IBM_SHIFT)
#define I2S_RXCR_IBM_LSJM	(1 << I2S_RXCR_IBM_SHIFT)
#define I2S_RXCR_IBM_RSJM	(2 << I2S_RXCR_IBM_SHIFT)
#define I2S_RXCR_IBM_MASK	(3 << I2S_RXCR_IBM_SHIFT)
#define I2S_RXCR_PBM_SHIFT	7
#define I2S_RXCR_PBM_MODE(x)	((x) << I2S_RXCR_PBM_SHIFT)
#define I2S_RXCR_PBM_MASK	(3 << I2S_RXCR_PBM_SHIFT)
#define I2S_RXCR_TFS_SHIFT	5
#define I2S_RXCR_TFS_I2S	(0 << I2S_RXCR_TFS_SHIFT)
#define I2S_RXCR_TFS_PCM	(1 << I2S_RXCR_TFS_SHIFT)
#define I2S_RXCR_TFS_TDM_PCM	(2 << I2S_RXCR_TFS_SHIFT)
#define I2S_RXCR_TFS_TDM_I2S	(3 << I2S_RXCR_TFS_SHIFT)
#define I2S_RXCR_TFS_MASK	(3 << I2S_RXCR_TFS_SHIFT)
#define I2S_RXCR_VDW_SHIFT	0
#define I2S_RXCR_VDW(x)		(((x) - 1) << I2S_RXCR_VDW_SHIFT)
#define I2S_RXCR_VDW_MASK	(0x1f << I2S_RXCR_VDW_SHIFT)

/*
 * CKR
 * clock generation register
 */
#define I2S_CKR_TRCM_SHIFT	28
#define I2S_CKR_TRCM(x)	((x) << I2S_CKR_TRCM_SHIFT)
#define I2S_CKR_TRCM_TXRX	(0 << I2S_CKR_TRCM_SHIFT)
#define I2S_CKR_TRCM_TXONLY	(1 << I2S_CKR_TRCM_SHIFT)
#define I2S_CKR_TRCM_RXONLY	(2 << I2S_CKR_TRCM_SHIFT)
#define I2S_CKR_TRCM_MASK	(3 << I2S_CKR_TRCM_SHIFT)
#define I2S_CKR_MSS_SHIFT	27
#define I2S_CKR_MSS_MASTER	(0 << I2S_CKR_MSS_SHIFT)
#define I2S_CKR_MSS_SLAVE	(1 << I2S_CKR_MSS_SHIFT)

Annotation

Implementation Notes