sound/soc/sof/intel/hda-ipc.h
Source file repositories/reference/linux-study-clean/sound/soc/sof/intel/hda-ipc.h
File Facts
- System
- Linux kernel
- Corpus path
sound/soc/sof/intel/hda-ipc.h- Extension
.h- Size
- 1746 bytes
- Lines
- 57
- Domain
- Driver Families
- Bucket
- sound/soc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __SOF_INTEL_HDA_IPC_H
#define __SOF_INTEL_HDA_IPC_H
/*
* Primary register, mapped to
* - DIPCTDR (HIPCIDR) in sideband IPC (cAVS 1.8+)
* - DIPCT in cAVS 1.5 IPC
*
* Secondary register, mapped to:
* - DIPCTDD (HIPCIDD) in sideband IPC (cAVS 1.8+)
* - DIPCTE in cAVS 1.5 IPC
*/
/* Common bits in primary register */
/* Reserved for doorbell */
#define HDA_IPC_RSVD_31 BIT(31)
/* Target, 0 - normal message, 1 - compact message(cAVS compatible) */
#define HDA_IPC_MSG_COMPACT BIT(30)
/* Direction, 0 - request, 1 - response */
#define HDA_IPC_RSP BIT(29)
#define HDA_IPC_TYPE_SHIFT 24
#define HDA_IPC_TYPE_MASK GENMASK(28, 24)
#define HDA_IPC_TYPE(x) ((x) << HDA_IPC_TYPE_SHIFT)
#define HDA_IPC_PM_GATE HDA_IPC_TYPE(0x8U)
/* Command specific payload bits in secondary register */
/* Disable DMA tracing (0 - keep tracing, 1 - to disable DMA trace) */
#define HDA_PM_NO_DMA_TRACE BIT(4)
/* Prevent clock gating (0 - cg allowed, 1 - DSP clock always on) */
#define HDA_PM_PCG BIT(3)
/* Prevent power gating (0 - deep power state transitions allowed) */
#define HDA_PM_PPG BIT(2)
/* Indicates whether streaming is active */
#define HDA_PM_PG_STREAMING BIT(1)
#define HDA_PM_PG_RSVD BIT(0)
irqreturn_t cnl_ipc_irq_thread(int irq, void *context);
int cnl_ipc_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg);
void cnl_ipc_dump(struct snd_sof_dev *sdev);
void cnl_ipc4_dump(struct snd_sof_dev *sdev);
#endif
Annotation
- Atlas domain: Driver Families / sound/soc.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.