sound/soc/stm/stm32_sai_sub.c
Source file repositories/reference/linux-study-clean/sound/soc/stm/stm32_sai_sub.c
File Facts
- System
- Linux kernel
- Corpus path
sound/soc/stm/stm32_sai_sub.c- Extension
.c- Size
- 47715 bytes
- Lines
- 1796
- Domain
- Driver Families
- Bucket
- sound/soc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/clk-provider.hlinux/kernel.hlinux/module.hlinux/of_irq.hlinux/of_platform.hlinux/pm_runtime.hlinux/regmap.hsound/asoundef.hsound/core.hsound/dmaengine_pcm.hsound/pcm_params.hstm32_sai.h
Detected Declarations
struct stm32_sai_sub_datastruct stm32_sai_mclk_dataenum stm32_sai_fifo_thfunction stm32_sai_sub_readable_regfunction stm32_sai_sub_volatile_regfunction stm32_sai_sub_writeable_regfunction stm32_sai_sub_reg_upfunction stm32_sai_sub_reg_wrfunction stm32_sai_sub_reg_rdfunction snd_pcm_iec958_infofunction snd_pcm_iec958_getfunction snd_pcm_iec958_putfunction stm32_sai_get_clk_divfunction stm32_sai_set_clk_divfunction stm32_sai_rate_accuratefunction stm32_sai_set_parent_clkfunction stm32_sai_put_parent_ratefunction stm32_sai_set_parent_ratefunction stm32_sai_mclk_determine_ratefunction stm32_sai_mclk_recalc_ratefunction stm32_sai_mclk_set_ratefunction stm32_sai_mclk_enablefunction stm32_sai_mclk_disablefunction stm32_sai_add_mclk_providerfunction stm32_sai_isrfunction scoped_guardfunction stm32_sai_set_sysclkfunction stm32_sai_set_dai_tdm_slotfunction stm32_sai_set_dai_fmtfunction stm32_sai_startupfunction stm32_sai_set_configfunction stm32_sai_set_slotsfunction stm32_sai_set_framefunction stm32_sai_init_iec958_statusfunction stm32_sai_set_iec958_statusfunction stm32_sai_configure_clockfunction stm32_sai_hw_paramsfunction stm32_sai_triggerfunction stm32_sai_shutdownfunction stm32_sai_pcm_newfunction stm32_sai_dai_probefunction stm32_sai_pcm_process_spdiffunction stm32_sai_sub_parse_offunction stm32_sai_sub_probefunction stm32_sai_sub_removefunction stm32_sai_sub_suspendfunction stm32_sai_sub_resume
Annotated Snippet
struct stm32_sai_sub_data {
struct platform_device *pdev;
struct regmap *regmap;
const struct regmap_config *regmap_config;
struct snd_dmaengine_dai_dma_data dma_params;
struct snd_soc_dai_driver cpu_dai_drv;
struct snd_soc_dai *cpu_dai;
struct snd_pcm_substream *substream;
struct stm32_sai_data *pdata;
struct device_node *np_sync_provider;
struct clk *sai_ck;
struct clk *sai_mclk;
dma_addr_t phys_addr;
unsigned int mclk_rate;
unsigned int id;
int dir;
bool master;
bool spdif;
bool sai_ck_used;
int fmt;
int sync;
int synco;
int synci;
int fs_length;
int slots;
int slot_width;
int slot_mask;
int data_size;
unsigned int spdif_frm_cnt;
struct snd_aes_iec958 iec958;
struct mutex ctrl_lock; /* protect resources accessed by controls */
spinlock_t irq_lock; /* used to prevent race condition with IRQ */
int (*set_sai_ck_rate)(struct stm32_sai_sub_data *sai, unsigned int rate);
void (*put_sai_ck_rate)(struct stm32_sai_sub_data *sai);
};
enum stm32_sai_fifo_th {
STM_SAI_FIFO_TH_EMPTY,
STM_SAI_FIFO_TH_QUARTER,
STM_SAI_FIFO_TH_HALF,
STM_SAI_FIFO_TH_3_QUARTER,
STM_SAI_FIFO_TH_FULL,
};
static bool stm32_sai_sub_readable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case STM_SAI_CR1_REGX:
case STM_SAI_CR2_REGX:
case STM_SAI_FRCR_REGX:
case STM_SAI_SLOTR_REGX:
case STM_SAI_IMR_REGX:
case STM_SAI_SR_REGX:
case STM_SAI_CLRFR_REGX:
case STM_SAI_DR_REGX:
case STM_SAI_PDMCR_REGX:
case STM_SAI_PDMLY_REGX:
return true;
default:
return false;
}
}
static bool stm32_sai_sub_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case STM_SAI_DR_REGX:
case STM_SAI_SR_REGX:
return true;
default:
return false;
}
}
static bool stm32_sai_sub_writeable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case STM_SAI_CR1_REGX:
case STM_SAI_CR2_REGX:
case STM_SAI_FRCR_REGX:
case STM_SAI_SLOTR_REGX:
case STM_SAI_IMR_REGX:
case STM_SAI_CLRFR_REGX:
case STM_SAI_DR_REGX:
case STM_SAI_PDMCR_REGX:
case STM_SAI_PDMLY_REGX:
return true;
default:
return false;
}
Annotation
- Immediate include surface: `linux/clk.h`, `linux/clk-provider.h`, `linux/kernel.h`, `linux/module.h`, `linux/of_irq.h`, `linux/of_platform.h`, `linux/pm_runtime.h`, `linux/regmap.h`.
- Detected declarations: `struct stm32_sai_sub_data`, `struct stm32_sai_mclk_data`, `enum stm32_sai_fifo_th`, `function stm32_sai_sub_readable_reg`, `function stm32_sai_sub_volatile_reg`, `function stm32_sai_sub_writeable_reg`, `function stm32_sai_sub_reg_up`, `function stm32_sai_sub_reg_wr`, `function stm32_sai_sub_reg_rd`, `function snd_pcm_iec958_info`.
- Atlas domain: Driver Families / sound/soc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.