sound/soc/tegra/tegra210_mvc.c

Source file repositories/reference/linux-study-clean/sound/soc/tegra/tegra210_mvc.c

File Facts

System
Linux kernel
Corpus path
sound/soc/tegra/tegra210_mvc.c
Extension
.c
Size
20996 bytes
Lines
782
Domain
Driver Families
Bucket
sound/soc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
// SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES.
// All rights reserved.
//
// tegra210_mvc.c - Tegra210 MVC driver

#include <linux/clk.h>
#include <linux/device.h>
#include <linux/io.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>

#include "tegra210_mvc.h"
#include "tegra_cif.h"

static const struct reg_default tegra210_mvc_reg_defaults[] = {
	{ TEGRA210_MVC_RX_INT_MASK, 0x00000001},
	{ TEGRA210_MVC_RX_CIF_CTRL, 0x00007700},
	{ TEGRA210_MVC_TX_INT_MASK, 0x00000001},
	{ TEGRA210_MVC_TX_CIF_CTRL, 0x00007700},
	{ TEGRA210_MVC_CG, 0x1},
	{ TEGRA210_MVC_CTRL, TEGRA210_MVC_CTRL_DEFAULT},
	{ TEGRA210_MVC_INIT_VOL, 0x00800000},
	{ TEGRA210_MVC_TARGET_VOL, 0x00800000},
	{ TEGRA210_MVC_DURATION, 0x000012c0},
	{ TEGRA210_MVC_DURATION_INV, 0x0006d3a0},
	{ TEGRA210_MVC_POLY_N1, 0x0000007d},
	{ TEGRA210_MVC_POLY_N2, 0x00000271},
	{ TEGRA210_MVC_PEAK_CTRL, 0x000012c0},
	{ TEGRA210_MVC_CFG_RAM_CTRL, 0x00004000},
};

static const struct tegra210_mvc_gain_params gain_params = {
	.poly_coeff = { 23738319, 659403, -3680,
			15546680, 2530732, -120985,
			12048422, 5527252, -785042 },
	.poly_n1 = 16,
	.poly_n2 = 63,
	.duration = 150,
	.duration_inv = 14316558,
};

static int tegra210_mvc_runtime_suspend(struct device *dev)
{
	struct tegra210_mvc *mvc = dev_get_drvdata(dev);

	regmap_read(mvc->regmap, TEGRA210_MVC_CTRL, &(mvc->ctrl_value));

	regcache_cache_only(mvc->regmap, true);
	regcache_mark_dirty(mvc->regmap);

	return 0;
}

static int tegra210_mvc_runtime_resume(struct device *dev)
{
	struct tegra210_mvc *mvc = dev_get_drvdata(dev);

	regcache_cache_only(mvc->regmap, false);
	regcache_sync(mvc->regmap);

	regmap_write(mvc->regmap, TEGRA210_MVC_CTRL, mvc->ctrl_value);
	regmap_update_bits(mvc->regmap,
			   TEGRA210_MVC_SWITCH,
			   TEGRA210_MVC_VOLUME_SWITCH_MASK,
			   TEGRA210_MVC_VOLUME_SWITCH_TRIGGER);

	return 0;
}

static void tegra210_mvc_write_ram(struct regmap *regmap)
{
	int i;

	regmap_write(regmap, TEGRA210_MVC_CFG_RAM_CTRL,
		     TEGRA210_MVC_CFG_RAM_CTRL_SEQ_ACCESS_EN |
		     TEGRA210_MVC_CFG_RAM_CTRL_ADDR_INIT_EN |
		     TEGRA210_MVC_CFG_RAM_CTRL_RW_WRITE);

	for (i = 0; i < NUM_GAIN_POLY_COEFFS; i++)
		regmap_write(regmap, TEGRA210_MVC_CFG_RAM_DATA,
			     gain_params.poly_coeff[i]);
}

Annotation

Implementation Notes