tools/arch/x86/kcpuid/cpuid.csv
Source file repositories/reference/linux-study-clean/tools/arch/x86/kcpuid/cpuid.csv
File Facts
- System
- Linux kernel
- Corpus path
tools/arch/x86/kcpuid/cpuid.csv- Extension
.csv- Size
- 94447 bytes
- Lines
- 1196
- Domain
- Support Tooling And Documentation
- Bucket
- tools
- Inferred role
- Support Tooling And Documentation: tools
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: CC0-1.0
# Generator: x86-cpuid-db v3.1
#
# Auto-generated file.
# Please submit all updates and bugfixes to https://x86-cpuid.org
#
# The basic row format is:
# LEAF, SUBLEAVES, reg, bits, short_name , long_description
# Leaf 0H
# Maximum standard leaf + CPU vendor string
0x0, 0, eax, 31:0, max_std_leaf , Highest standard CPUID leaf
0x0, 0, ebx, 31:0, cpu_vendorid_0 , CPU vendor ID string bytes 0 - 3
0x0, 0, ecx, 31:0, cpu_vendorid_2 , CPU vendor ID string bytes 8 - 11
0x0, 0, edx, 31:0, cpu_vendorid_1 , CPU vendor ID string bytes 4 - 7
# Leaf 1H
# CPU FMS (Family/Model/Stepping) + standard feature flags
0x1, 0, eax, 3:0, stepping , Stepping ID
0x1, 0, eax, 7:4, base_model , Base CPU model ID
0x1, 0, eax, 11:8, base_family_id , Base CPU family ID
0x1, 0, eax, 13:12, cpu_type , CPU type
0x1, 0, eax, 19:16, ext_model , Extended CPU model ID
0x1, 0, eax, 27:20, ext_family , Extended CPU family ID
0x1, 0, ebx, 7:0, brand_id , Brand index
0x1, 0, ebx, 15:8, clflush_size , CLFLUSH instruction cache line size
0x1, 0, ebx, 23:16, n_logical_cpu , Logical CPU count
0x1, 0, ebx, 31:24, local_apic_id , Initial local APIC physical ID
0x1, 0, ecx, 0, pni , Streaming SIMD Extensions 3 (SSE3)
0x1, 0, ecx, 1, pclmulqdq , PCLMULQDQ instruction support
0x1, 0, ecx, 2, dtes64 , 64-bit DS save area
0x1, 0, ecx, 3, monitor , MONITOR/MWAIT support
0x1, 0, ecx, 4, ds_cpl , CPL Qualified Debug Store
0x1, 0, ecx, 5, vmx , Virtual Machine Extensions
0x1, 0, ecx, 6, smx , Safer Mode Extensions
0x1, 0, ecx, 7, est , Enhanced Intel SpeedStep
0x1, 0, ecx, 8, tm2 , Thermal Monitor 2
0x1, 0, ecx, 9, ssse3 , Supplemental SSE3
0x1, 0, ecx, 10, cid , L1 Context ID
0x1, 0, ecx, 11, sdbg , Silicon Debug
0x1, 0, ecx, 12, fma , FMA extensions using YMM state
0x1, 0, ecx, 13, cx16 , CMPXCHG16B instruction support
0x1, 0, ecx, 14, xtpr , xTPR Update Control
0x1, 0, ecx, 15, pdcm , Perfmon and Debug Capability
0x1, 0, ecx, 17, pcid , Process-context identifiers
0x1, 0, ecx, 18, dca , Direct Cache Access
0x1, 0, ecx, 19, sse4_1 , SSE4.1
0x1, 0, ecx, 20, sse4_2 , SSE4.2
0x1, 0, ecx, 21, x2apic , X2APIC support
0x1, 0, ecx, 22, movbe , MOVBE instruction support
0x1, 0, ecx, 23, popcnt , POPCNT instruction support
0x1, 0, ecx, 24, tsc_deadline_timer , APIC timer one-shot operation
0x1, 0, ecx, 25, aes , AES instructions
0x1, 0, ecx, 26, xsave , XSAVE (and related instructions) support
0x1, 0, ecx, 27, osxsave , XSAVE (and related instructions) are enabled by OS
0x1, 0, ecx, 28, avx , AVX instructions support
0x1, 0, ecx, 29, f16c , Half-precision floating-point conversion support
0x1, 0, ecx, 30, rdrand , RDRAND instruction support
0x1, 0, ecx, 31, guest_status , System is running as guest; (para-)virtualized system
0x1, 0, edx, 0, fpu , Floating-Point Unit on-chip (x87)
0x1, 0, edx, 1, vme , Virtual-8086 Mode Extensions
0x1, 0, edx, 2, de , Debugging Extensions
0x1, 0, edx, 3, pse , Page Size Extension
0x1, 0, edx, 4, tsc , Time Stamp Counter
0x1, 0, edx, 5, msr , Model-Specific Registers (RDMSR and WRMSR support)
0x1, 0, edx, 6, pae , Physical Address Extensions
Annotation
- Atlas domain: Support Tooling And Documentation / tools.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.