tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json
Extension
.json
Size
16626 bytes
Lines
387
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
	"MetricName": "branch_miss_pred_rate",
	"MetricExpr": "BR_MIS_PRED / BR_PRED",
	"BriefDescription": "Branch predictor misprediction rate. May not count branches that are never resolved because they are in the misprediction shadow of an earlier branch",
	"MetricGroup": "branch",
        "ScaleUnit": "100%"
    },
    {
	"MetricName": "bus_utilization",
	"MetricExpr": "((BUS_ACCESS / (BUS_CYCLES * 1)) * 100)",
	"BriefDescription": "Core-to-uncore bus utilization",
	"MetricGroup": "Bus",
        "ScaleUnit": "1percent of bus cycles"
    },
    {
        "MetricName": "l1d_cache_miss_ratio",
        "MetricExpr": "(L1D_CACHE_REFILL / L1D_CACHE)",
        "BriefDescription": "This metric measures the ratio of level 1 data cache accesses missed to the total number of level 1 data cache accesses. This gives an indication of the effectiveness of the level 1 data cache.",
        "MetricGroup": "Miss_Ratio;L1D_Cache_Effectiveness",
        "ScaleUnit": "1per cache access"
    },
    {
        "MetricName": "l1i_cache_miss_ratio",
        "MetricExpr": "(L1I_CACHE_REFILL / L1I_CACHE)",
        "BriefDescription": "This metric measures the ratio of level 1 instruction cache accesses missed to the total number of level 1 instruction cache accesses. This gives an indication of the effectiveness of the level 1 instruction cache.",
        "MetricGroup": "Miss_Ratio;L1I_Cache_Effectiveness",
        "ScaleUnit": "1per cache access"
    },
    {
	"MetricName": "Miss_Ratio;l1d_cache_read_miss",
	"MetricExpr": "L1D_CACHE_LMISS_RD / L1D_CACHE_RD",
	"BriefDescription": "L1D cache read miss rate",
	"MetricGroup": "Cache",
        "ScaleUnit": "1per cache read access"
    },
    {
        "MetricName": "l2_cache_miss_ratio",
        "MetricExpr": "(L2D_CACHE_REFILL / L2D_CACHE)",
        "BriefDescription": "This metric measures the ratio of level 2 cache accesses missed to the total number of level 2 cache accesses. This gives an indication of the effectiveness of the level 2 cache, which is a unified cache that stores both data and instruction. Note that cache accesses in this cache are either data memory access or instruction fetch as this is a unified cache.",
        "MetricGroup": "Miss_Ratio;L2_Cache_Effectiveness",
        "ScaleUnit": "1per cache access"
    },
    {
	"MetricName": "l1i_cache_read_miss_rate",
	"MetricExpr": "L1I_CACHE_LMISS / L1I_CACHE",
	"BriefDescription": "L1I cache read miss rate",
	"MetricGroup": "Cache",
        "ScaleUnit": "1per cache access"
    },
    {
	"MetricName": "l2d_cache_read_miss_rate",
	"MetricExpr": "L2D_CACHE_LMISS_RD / L2D_CACHE_RD",
	"BriefDescription": "L2 cache read miss rate",
	"MetricGroup": "Cache",
        "ScaleUnit": "1per cache read access"
    },
    {
	"MetricName": "l1d_cache_miss_mpki",
	"MetricExpr": "(L1D_CACHE_LMISS_RD * 1e3) / INST_RETIRED",
	"BriefDescription": "Misses per thousand instructions (data)",
	"MetricGroup": "Cache",
        "ScaleUnit": "1MPKI"
    },
    {
	"MetricName": "l1i_cache_miss_mpki",
	"MetricExpr": "(L1I_CACHE_LMISS * 1e3) / INST_RETIRED",
	"BriefDescription": "Misses per thousand instructions (instruction)",
	"MetricGroup": "Cache",
        "ScaleUnit": "1MPKI"

Annotation

Implementation Notes