tools/perf/pmu-events/arch/arm64/ampere/ampereonex/mmu.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/mmu.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/arm64/ampere/ampereonex/mmu.json
Extension
.json
Size
7097 bytes
Lines
171
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "PublicDescription": "Level 2 data translation buffer allocation",
        "EventCode": "0xD800",
        "EventName": "MMU_D_OTB_ALLOC",
        "BriefDescription": "Level 2 data translation buffer allocation"
    },
    {
        "PublicDescription": "Data TLB translation cache hit on S1L2 walk cache entry",
        "EventCode": "0xd801",
        "EventName": "MMU_D_TRANS_CACHE_HIT_S1L2_WALK",
        "BriefDescription": "Data TLB translation cache hit on S1L2 walk cache entry"
    },
    {
        "PublicDescription": "Data TLB translation cache hit on S1L1 walk cache entry",
        "EventCode": "0xd802",
        "EventName": "MMU_D_TRANS_CACHE_HIT_S1L1_WALK",
        "BriefDescription": "Data TLB translation cache hit on S1L1 walk cache entry"
    },
    {
        "PublicDescription": "Data TLB translation cache hit on S1L0 walk cache entry",
        "EventCode": "0xd803",
        "EventName": "MMU_D_TRANS_CACHE_HIT_S1L0_WALK",
        "BriefDescription": "Data TLB translation cache hit on S1L0 walk cache entry"
    },
    {
        "PublicDescription": "Data TLB translation cache hit on S2L2 walk cache entry",
        "EventCode": "0xd804",
        "EventName": "MMU_D_TRANS_CACHE_HIT_S2L2_WALK",
        "BriefDescription": "Data TLB translation cache hit on S2L2 walk cache entry"
    },
    {
        "PublicDescrition": "Data TLB translation cache hit on S2L1 walk cache entry",
        "EventCode": "0xd805",
        "EventName": "MMU_D_TRANS_CACHE_HIT_S2L1_WALK",
        "BriefDescription": "Data TLB translation cache hit on S2L1 walk cache entry"
    },
    {
        "PublicDescrition": "Data TLB translation cache hit on S2L0 walk cache entry",
        "EventCode": "0xd806",
        "EventName": "MMU_D_TRANS_CACHE_HIT_S2L0_WALK",
        "BriefDescription": "Data TLB translation cache hit on S2L0 walk cache entry"
    },
    {
        "PublicDescrition": "Data-side S1 page walk cache lookup",
        "EventCode": "0xd807",
        "EventName": "MMU_D_S1_WALK_CACHE_LOOKUP",
        "BriefDescription": "Data-side S1 page walk cache lookup"
    },
    {
        "PublicDescrition": "Data-side S1 page walk cache refill",
        "EventCode": "0xd808",
        "EventName": "MMU_D_S1_WALK_CACHE_REFILL",
        "BriefDescription": "Data-side S1 page walk cache refill"
    },
    {
        "PublicDescrition": "Data-side S2 page walk cache lookup",
        "EventCode": "0xd809",
        "EventName": "MMU_D_S2_WALK_CACHE_LOOKUP",
        "BriefDescription": "Data-side S2 page walk cache lookup"
    },
    {
        "PublicDescrition": "Data-side S2 page walk cache refill",
        "EventCode": "0xd80a",
        "EventName": "MMU_D_S2_WALK_CACHE_REFILL",
        "BriefDescription": "Data-side S2 page walk cache refill"
    },
    {
        "PublicDescription": "Data-side S1 table walk fault",
        "EventCode": "0xD80B",

Annotation

Implementation Notes