tools/perf/pmu-events/arch/arm64/arm/cortex-a65-e1/ifu.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/arm/cortex-a65-e1/ifu.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/arm64/arm/cortex-a65-e1/ifu.json
Extension
.json
Size
5483 bytes
Lines
123
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "PublicDescription": "I-Cache miss on an access from the prefetch block",
        "EventCode": "0xD0",
        "EventName": "IFU_IC_MISS_WAIT",
        "BriefDescription": "I-Cache miss on an access from the prefetch block"
    },
    {
        "PublicDescription": "Counts the cycles spent on a request for Level 2 TLB lookup after a Level 1l ITLB miss",
        "EventCode": "0xD1",
        "EventName": "IFU_IUTLB_MISS_WAIT",
        "BriefDescription": "Counts the cycles spent on a request for Level 2 TLB lookup after a Level 1l ITLB miss"
    },
    {
        "PublicDescription": "Micro-predictor conditional/direction mispredict, with respect to. if3/if4 predictor",
        "EventCode": "0xD2",
        "EventName": "IFU_MICRO_COND_MISPRED",
        "BriefDescription": "Micro-predictor conditional/direction mispredict, with respect to. if3/if4 predictor"
    },
    {
        "PublicDescription": "Micro-predictor address mispredict, with respect to if3/if4 predictor",
        "EventCode": "0xD3",
        "EventName": "IFU_MICRO_CADDR_MISPRED",
        "BriefDescription": "Micro-predictor address mispredict, with respect to if3/if4 predictor"
    },
    {
        "PublicDescription": "Micro-predictor hit with immediate redirect",
        "EventCode": "0xD4",
        "EventName": "IFU_MICRO_HIT",
        "BriefDescription": "Micro-predictor hit with immediate redirect"
    },
    {
        "PublicDescription": "Micro-predictor negative cache hit",
        "EventCode": "0xD6",
        "EventName": "IFU_MICRO_NEG_HIT",
        "BriefDescription": "Micro-predictor negative cache hit"
    },
    {
        "PublicDescription": "Micro-predictor correction",
        "EventCode": "0xD7",
        "EventName": "IFU_MICRO_CORRECTION",
        "BriefDescription": "Micro-predictor correction"
    },
    {
        "PublicDescription": "A 2nd instruction could have been pushed but was not because it was nonsequential",
        "EventCode": "0xD8",
        "EventName": "IFU_MICRO_NO_INSTR1",
        "BriefDescription": "A 2nd instruction could have been pushed but was not because it was nonsequential"
    },
    {
        "PublicDescription": "Micro-predictor miss",
        "EventCode": "0xD9",
        "EventName": "IFU_MICRO_NO_PRED",
        "BriefDescription": "Micro-predictor miss"
    },
    {
        "PublicDescription": "Thread flushed due to TLB miss",
        "EventCode": "0xDA",
        "EventName": "IFU_FLUSHED_TLB_MISS",
        "BriefDescription": "Thread flushed due to TLB miss"
    },
    {
        "PublicDescription": "Thread flushed due to reasons other than TLB miss",
        "EventCode": "0xDB",
        "EventName": "IFU_FLUSHED_EXCL_TLB_MISS",
        "BriefDescription": "Thread flushed due to reasons other than TLB miss"
    },
    {
        "PublicDescription": "This thread and the other thread both ready for scheduling in if0",
        "EventCode": "0xDC",

Annotation

Implementation Notes