tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/retired.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/retired.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/retired.json
Extension
.json
Size
2185 bytes
Lines
31
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "ArchStdEvent": "SW_INCR",
        "PublicDescription": "Counts software writes to the PMSWINC_EL0 (software PMU increment) register. The PMSWINC_EL0 register is a manually updated counter for use by application software.\n\nThis event could be used to measure any user program event, such as accesses to a particular data structure (by writing to the PMSWINC_EL0 register each time the data structure is accessed).\n\nTo use the PMSWINC_EL0 register and event, developers must insert instructions that write to the PMSWINC_EL0 register into the source code.\n\nSince the SW_INCR event records writes to the PMSWINC_EL0 register, there is no need to do a read/increment/write sequence to the PMSWINC_EL0 register."
    },
    {
        "ArchStdEvent": "INST_RETIRED",
        "PublicDescription": "Counts instructions that have been architecturally executed."
    },
    {
        "ArchStdEvent": "CID_WRITE_RETIRED",
        "PublicDescription": "Counts architecturally executed writes to the CONTEXTIDR register, which usually contain the kernel PID and can be output with hardware trace."
    },
    {
        "ArchStdEvent": "TTBR_WRITE_RETIRED",
        "PublicDescription": "Counts architectural writes to TTBR0/1_EL1. If virtualization host extensions are enabled (by setting the HCR_EL2.E2H bit to 1), then accesses to TTBR0/1_EL1 that are redirected to TTBR0/1_EL2, or accesses to TTBR0/1_EL12, are counted. TTBRn registers are typically updated when the kernel is swapping user-space threads or applications."
    },
    {
        "ArchStdEvent": "BR_RETIRED",
        "PublicDescription": "Counts architecturally executed branches, whether the branch is taken or not. Instructions that explicitly write to the PC are also counted."
    },
    {
        "ArchStdEvent": "BR_MIS_PRED_RETIRED",
        "PublicDescription": "Counts branches counted by BR_RETIRED which were mispredicted and caused a pipeline flush."
    },
    {
        "ArchStdEvent": "OP_RETIRED",
        "PublicDescription": "Counts micro-operations that are architecturally executed. This is a count of number of micro-operations retired from the commit queue in a single cycle."
    }
]

Annotation

Implementation Notes