tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/spec_operation.json
Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/spec_operation.json
File Facts
- System
- Linux kernel
- Corpus path
tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/spec_operation.json- Extension
.json- Size
- 5395 bytes
- Lines
- 111
- Domain
- Support Tooling And Documentation
- Bucket
- tools
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
[
{
"ArchStdEvent": "BR_MIS_PRED",
"PublicDescription": "Counts branches which are speculatively executed and mispredicted."
},
{
"ArchStdEvent": "BR_PRED",
"PublicDescription": "Counts branches speculatively executed and were predicted right."
},
{
"ArchStdEvent": "INST_SPEC",
"PublicDescription": "Counts operations that have been speculatively executed."
},
{
"ArchStdEvent": "OP_SPEC",
"PublicDescription": "Counts micro-operations speculatively executed. This is the count of the number of micro-operations dispatched in a cycle."
},
{
"ArchStdEvent": "UNALIGNED_LD_SPEC",
"PublicDescription": "Counts unaligned memory read operations issued by the CPU. This event counts unaligned accesses (as defined by the actual instruction), even if they are subsequently issued as multiple aligned accesses. The event does not count preload operations (PLD, PLI)."
},
{
"ArchStdEvent": "UNALIGNED_ST_SPEC",
"PublicDescription": "Counts unaligned memory write operations issued by the CPU. This event counts unaligned accesses (as defined by the actual instruction), even if they are subsequently issued as multiple aligned accesses."
},
{
"ArchStdEvent": "UNALIGNED_LDST_SPEC",
"PublicDescription": "Counts unaligned memory operations issued by the CPU. This event counts unaligned accesses (as defined by the actual instruction), even if they are subsequently issued as multiple aligned accesses."
},
{
"ArchStdEvent": "LDREX_SPEC",
"PublicDescription": "Counts Load-Exclusive operations that have been speculatively executed. Eg: LDREX, LDX"
},
{
"ArchStdEvent": "STREX_PASS_SPEC",
"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and have successfully completed the store operation."
},
{
"ArchStdEvent": "STREX_FAIL_SPEC",
"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and have not successfully completed the store operation."
},
{
"ArchStdEvent": "STREX_SPEC",
"PublicDescription": "Counts store-exclusive operations that have been speculatively executed."
},
{
"ArchStdEvent": "LD_SPEC",
"PublicDescription": "Counts speculatively executed load operations including Single Instruction Multiple Data (SIMD) load operations."
},
{
"ArchStdEvent": "ST_SPEC",
"PublicDescription": "Counts speculatively executed store operations including Single Instruction Multiple Data (SIMD) store operations."
},
{
"ArchStdEvent": "DP_SPEC",
"PublicDescription": "Counts speculatively executed logical or arithmetic instructions such as MOV/MVN operations."
},
{
"ArchStdEvent": "ASE_SPEC",
"PublicDescription": "Counts speculatively executed Advanced SIMD operations excluding load, store and move micro-operations that move data to or from SIMD (vector) registers."
},
{
"ArchStdEvent": "VFP_SPEC",
"PublicDescription": "Counts speculatively executed floating point operations. This event does not count operations that move data to or from floating point (vector) registers."
},
{
"ArchStdEvent": "PC_WRITE_SPEC",
"PublicDescription": "Counts speculatively executed operations which cause software changes of the PC. Those operations include all taken branch operations."
},
{
Annotation
- Atlas domain: Support Tooling And Documentation / tools.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.