tools/perf/pmu-events/arch/arm64/arm/neoverse-v3/exception.json
Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/arm/neoverse-v3/exception.json
File Facts
- System
- Linux kernel
- Corpus path
tools/perf/pmu-events/arch/arm64/arm/neoverse-v3/exception.json- Extension
.json- Size
- 3500 bytes
- Lines
- 63
- Domain
- Support Tooling And Documentation
- Bucket
- tools
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
[
{
"ArchStdEvent": "EXC_TAKEN",
"PublicDescription": "Counts any taken architecturally visible exceptions such as IRQ, FIQ, SError, and other synchronous exceptions. Exceptions are counted whether or not they are taken locally."
},
{
"ArchStdEvent": "EXC_RETURN",
"PublicDescription": "Counts any architecturally executed exception return instructions. For example: AArch64: ERET"
},
{
"ArchStdEvent": "EXC_UNDEF",
"PublicDescription": "Counts the number of synchronous exceptions which are taken locally that are due to attempting to execute an instruction that is UNDEFINED. Attempting to execute instruction bit patterns that have not been allocated. Attempting to execute instructions when they are disabled. Attempting to execute instructions at an inappropriate Exception level. Attempting to execute an instruction when the value of PSTATE.IL is 1."
},
{
"ArchStdEvent": "EXC_SVC",
"PublicDescription": "Counts SVC exceptions taken locally."
},
{
"ArchStdEvent": "EXC_PABORT",
"PublicDescription": "Counts synchronous exceptions that are taken locally and caused by Instruction Aborts."
},
{
"ArchStdEvent": "EXC_DABORT",
"PublicDescription": "Counts exceptions that are taken locally and are caused by data aborts or SErrors. Conditions that could cause those exceptions are attempting to read or write memory where the MMU generates a fault, attempting to read or write memory with a misaligned address, interrupts from the nSEI inputs and internally generated SErrors."
},
{
"ArchStdEvent": "EXC_IRQ",
"PublicDescription": "Counts IRQ exceptions including the virtual IRQs that are taken locally."
},
{
"ArchStdEvent": "EXC_FIQ",
"PublicDescription": "Counts FIQ exceptions including the virtual FIQs that are taken locally."
},
{
"ArchStdEvent": "EXC_SMC",
"PublicDescription": "Counts SMC exceptions take to EL3."
},
{
"ArchStdEvent": "EXC_HVC",
"PublicDescription": "Counts HVC exceptions taken to EL2."
},
{
"ArchStdEvent": "EXC_TRAP_PABORT",
"PublicDescription": "Counts exceptions which are traps not taken locally and are caused by Instruction Aborts. For example, attempting to execute an instruction with a misaligned PC."
},
{
"ArchStdEvent": "EXC_TRAP_DABORT",
"PublicDescription": "Counts exceptions which are traps not taken locally and are caused by Data Aborts or SError interrupts. Conditions that could cause those exceptions are:\n\n1. Attempting to read or write memory where the MMU generates a fault,\n2. Attempting to read or write memory with a misaligned address,\n3. Interrupts from the SEI input.\n4. internally generated SErrors."
},
{
"ArchStdEvent": "EXC_TRAP_OTHER",
"PublicDescription": "Counts the number of synchronous trap exceptions which are not taken locally and are not SVC, SMC, HVC, data aborts, Instruction Aborts, or interrupts."
},
{
"ArchStdEvent": "EXC_TRAP_IRQ",
"PublicDescription": "Counts IRQ exceptions including the virtual IRQs that are not taken locally."
},
{
"ArchStdEvent": "EXC_TRAP_FIQ",
"PublicDescription": "Counts FIQs which are not taken locally but taken from EL0, EL1,\n or EL2 to EL3 (which would be the normal behavior for FIQs when not executing\n in EL3)."
}
]
Annotation
- Atlas domain: Support Tooling And Documentation / tools.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.