tools/perf/pmu-events/arch/arm64/common-and-microarch.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/common-and-microarch.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/arm64/common-and-microarch.json
Extension
.json
Size
77716 bytes
Lines
1981
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "PublicDescription": "Instruction architecturally executed, Condition code check pass, software increment",
        "EventCode": "0x00",
        "EventName": "SW_INCR",
        "BriefDescription": "Instruction architecturally executed, Condition code check pass, software increment"
    },
    {
        "PublicDescription": "Level 1 instruction cache refill",
        "EventCode": "0x01",
        "EventName": "L1I_CACHE_REFILL",
        "BriefDescription": "Level 1 instruction cache refill"
    },
    {
        "PublicDescription": "Attributable Level 1 instruction TLB refill",
        "EventCode": "0x02",
        "EventName": "L1I_TLB_REFILL",
        "BriefDescription": "Attributable Level 1 instruction TLB refill"
    },
    {
        "PublicDescription": "Level 1 data cache refill",
        "EventCode": "0x03",
        "EventName": "L1D_CACHE_REFILL",
        "BriefDescription": "Level 1 data cache refill"
    },
    {
        "PublicDescription": "Level 1 data cache access",
        "EventCode": "0x04",
        "EventName": "L1D_CACHE",
        "BriefDescription": "Level 1 data cache access"
    },
    {
        "PublicDescription": "Attributable Level 1 data TLB refill",
        "EventCode": "0x05",
        "EventName": "L1D_TLB_REFILL",
        "BriefDescription": "Attributable Level 1 data TLB refill"
    },
    {
        "PublicDescription": "Instruction architecturally executed, condition code check pass, load",
        "EventCode": "0x06",
        "EventName": "LD_RETIRED",
        "BriefDescription": "Instruction architecturally executed, condition code check pass, load"
    },
    {
        "PublicDescription": "Instruction architecturally executed, condition code check pass, store",
        "EventCode": "0x07",
        "EventName": "ST_RETIRED",
        "BriefDescription": "Instruction architecturally executed, condition code check pass, store"
    },
    {
        "PublicDescription": "Instruction architecturally executed",
        "EventCode": "0x08",
        "EventName": "INST_RETIRED",
        "BriefDescription": "Instruction architecturally executed"
    },
    {
        "PublicDescription": "Exception taken",
        "EventCode": "0x09",
        "EventName": "EXC_TAKEN",
        "BriefDescription": "Exception taken"
    },
    {
        "PublicDescription": "Instruction architecturally executed, condition check pass, exception return",
        "EventCode": "0x0a",
        "EventName": "EXC_RETURN",
        "BriefDescription": "Instruction architecturally executed, condition check pass, exception return"
    },
    {
        "PublicDescription": "Instruction architecturally executed, condition code check pass, write to CONTEXTIDR",
        "EventCode": "0x0b",

Annotation

Implementation Notes