tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/other.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/other.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/other.json
Extension
.json
Size
10594 bytes
Lines
189
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
  {
    "PublicDescription": "This event counts the occurrence count of the micro-operation split.",
    "EventCode": "0x139",
    "EventName": "UOP_SPLIT",
    "BriefDescription": "This event counts the occurrence count of the micro-operation split."
  },
  {
    "PublicDescription": "This event counts every cycle that no operation was committed because the oldest and uncommitted load/store/prefetch operation waits for memory access.",
    "EventCode": "0x180",
    "EventName": "LD_COMP_WAIT_L2_MISS",
    "BriefDescription": "This event counts every cycle that no operation was committed because the oldest and uncommitted load/store/prefetch operation waits for memory access."
  },
  {
    "PublicDescription": "This event counts every cycle that no instruction was committed because the oldest and uncommitted integer load operation waits for memory access.",
    "EventCode": "0x181",
    "EventName": "LD_COMP_WAIT_L2_MISS_EX",
    "BriefDescription": "This event counts every cycle that no instruction was committed because the oldest and uncommitted integer load operation waits for memory access."
  },
  {
    "PublicDescription": "This event counts every cycle that no instruction was committed because the oldest and uncommitted load/store/prefetch operation waits for L2 cache access.",
    "EventCode": "0x182",
    "EventName": "LD_COMP_WAIT_L1_MISS",
    "BriefDescription": "This event counts every cycle that no instruction was committed because the oldest and uncommitted load/store/prefetch operation waits for L2 cache access."
  },
  {
    "PublicDescription": "This event counts every cycle that no instruction was committed because the oldest and uncommitted integer load operation waits for L2 cache access.",
    "EventCode": "0x183",
    "EventName": "LD_COMP_WAIT_L1_MISS_EX",
    "BriefDescription": "This event counts every cycle that no instruction was committed because the oldest and uncommitted integer load operation waits for L2 cache access."
  },
  {
    "PublicDescription": "This event counts every cycle that no instruction was committed because the oldest and uncommitted load/store/prefetch operation waits for L1D cache, L2 cache and memory access.",
    "EventCode": "0x184",
    "EventName": "LD_COMP_WAIT",
    "BriefDescription": "This event counts every cycle that no instruction was committed because the oldest and uncommitted load/store/prefetch operation waits for L1D cache, L2 cache and memory access."
  },
  {
    "PublicDescription": "This event counts every cycle that no instruction was committed because the oldest and uncommitted integer load operation waits for L1D cache, L2 cache and memory access.",
    "EventCode": "0x185",
    "EventName": "LD_COMP_WAIT_EX",
    "BriefDescription": "This event counts every cycle that no instruction was committed because the oldest and uncommitted integer load operation waits for L1D cache, L2 cache and memory access."
  },
  {
    "PublicDescription": "This event counts every cycle that no instruction was committed due to the lack of an available prefetch port.",
    "EventCode": "0x186",
    "EventName": "LD_COMP_WAIT_PFP_BUSY",
    "BriefDescription": "This event counts every cycle that no instruction was committed due to the lack of an available prefetch port."
  },
  {
    "PublicDescription": "This event counts the LD_COMP_WAIT_PFP_BUSY caused by an integer load operation.",
    "EventCode": "0x187",
    "EventName": "LD_COMP_WAIT_PFP_BUSY_EX",
    "BriefDescription": "This event counts the LD_COMP_WAIT_PFP_BUSY caused by an integer load operation."
  },
  {
    "PublicDescription": "This event counts the LD_COMP_WAIT_PFP_BUSY caused by a software prefetch instruction.",
    "EventCode": "0x188",
    "EventName": "LD_COMP_WAIT_PFP_BUSY_SWPF",
    "BriefDescription": "This event counts the LD_COMP_WAIT_PFP_BUSY caused by a software prefetch instruction."
  },
  {
    "PublicDescription": "This event counts every cycle that no instruction was committed and the oldest and uncommitted instruction is an integer or floating-point/SIMD instruction.",
    "EventCode": "0x189",
    "EventName": "EU_COMP_WAIT",
    "BriefDescription": "This event counts every cycle that no instruction was committed and the oldest and uncommitted instruction is an integer or floating-point/SIMD instruction."
  },
  {
    "PublicDescription": "This event counts every cycle that no instruction was committed and the oldest and uncommitted instruction is a floating-point/SIMD instruction.",
    "EventCode": "0x18A",

Annotation

Implementation Notes