tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/pipeline.json
Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/pipeline.json
File Facts
- System
- Linux kernel
- Corpus path
tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/pipeline.json- Extension
.json- Size
- 9325 bytes
- Lines
- 195
- Domain
- Support Tooling And Documentation
- Bucket
- tools
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
[
{
"ArchStdEvent": "STALL_FRONTEND"
},
{
"ArchStdEvent": "STALL_BACKEND"
},
{
"PublicDescription": "This event counts valid cycles of EAGA pipeline.",
"EventCode": "0x1A0",
"EventName": "EAGA_VAL",
"BriefDescription": "This event counts valid cycles of EAGA pipeline."
},
{
"PublicDescription": "This event counts valid cycles of EAGB pipeline.",
"EventCode": "0x1A1",
"EventName": "EAGB_VAL",
"BriefDescription": "This event counts valid cycles of EAGB pipeline."
},
{
"PublicDescription": "This event counts valid cycles of EXA pipeline.",
"EventCode": "0x1A2",
"EventName": "EXA_VAL",
"BriefDescription": "This event counts valid cycles of EXA pipeline."
},
{
"PublicDescription": "This event counts valid cycles of EXB pipeline.",
"EventCode": "0x1A3",
"EventName": "EXB_VAL",
"BriefDescription": "This event counts valid cycles of EXB pipeline."
},
{
"PublicDescription": "This event counts valid cycles of FLA pipeline.",
"EventCode": "0x1A4",
"EventName": "FLA_VAL",
"BriefDescription": "This event counts valid cycles of FLA pipeline."
},
{
"PublicDescription": "This event counts valid cycles of FLB pipeline.",
"EventCode": "0x1A5",
"EventName": "FLB_VAL",
"BriefDescription": "This event counts valid cycles of FLB pipeline."
},
{
"PublicDescription": "This event counts valid cycles of PRX pipeline.",
"EventCode": "0x1A6",
"EventName": "PRX_VAL",
"BriefDescription": "This event counts valid cycles of PRX pipeline."
},
{
"PublicDescription": "This event counts the number of 1's in the predicate bits of request in FLA pipeline, where it is corrected so that it becomes 16 when all bits are 1.",
"EventCode": "0x1B4",
"EventName": "FLA_VAL_PRD_CNT",
"BriefDescription": "This event counts the number of 1's in the predicate bits of request in FLA pipeline, where it is corrected so that it becomes 16 when all bits are 1."
},
{
"PublicDescription": "This event counts the number of 1's in the predicate bits of request in FLB pipeline, where it is corrected so that it becomes 16 when all bits are 1.",
"EventCode": "0x1B5",
"EventName": "FLB_VAL_PRD_CNT",
"BriefDescription": "This event counts the number of 1's in the predicate bits of request in FLB pipeline, where it is corrected so that it becomes 16 when all bits are 1."
},
{
"PublicDescription": "This event counts valid cycles of L1D cache pipeline#0.",
"EventCode": "0x240",
"EventName": "L1_PIPE0_VAL",
"BriefDescription": "This event counts valid cycles of L1D cache pipeline#0."
},
{
"PublicDescription": "This event counts valid cycles of L1D cache pipeline#1.",
"EventCode": "0x241",
Annotation
- Atlas domain: Support Tooling And Documentation / tools.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.