tools/perf/pmu-events/arch/arm64/fujitsu/monaka/fp_operation.json
Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/fp_operation.json
File Facts
- System
- Linux kernel
- Corpus path
tools/perf/pmu-events/arch/arm64/fujitsu/monaka/fp_operation.json- Extension
.json- Size
- 12691 bytes
- Lines
- 266
- Domain
- Support Tooling And Documentation
- Bucket
- tools
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
[
{
"EventCode": "0x0105",
"EventName": "FP_MV_SPEC",
"BriefDescription": "This event counts architecturally executed floating-point move operation."
},
{
"EventCode": "0x0112",
"EventName": "FP_LD_SPEC",
"BriefDescription": "This event counts architecturally executed NOSIMD load operations that using SIMD&FP registers."
},
{
"EventCode": "0x0113",
"EventName": "FP_ST_SPEC",
"BriefDescription": "This event counts architecturally executed NOSIMD store operations that using SIMD&FP registers."
},
{
"ArchStdEvent": "ASE_FP_SPEC",
"BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point operation."
},
{
"ArchStdEvent": "SVE_FP_SPEC",
"BriefDescription": "This event counts architecturally executed SVE floating-point operation."
},
{
"ArchStdEvent": "ASE_SVE_FP_SPEC",
"BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point operation."
},
{
"ArchStdEvent": "FP_HP_SPEC",
"BriefDescription": "This event counts architecturally executed half-precision floating-point operation."
},
{
"ArchStdEvent": "ASE_FP_HP_SPEC",
"BriefDescription": "This event counts architecturally executed Advanced SIMD half-precision floating-point operation."
},
{
"ArchStdEvent": "SVE_FP_HP_SPEC",
"BriefDescription": "This event counts architecturally executed SVE half-precision floating-point operation."
},
{
"ArchStdEvent": "ASE_SVE_FP_HP_SPEC",
"BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE half-precision floating-point operation."
},
{
"ArchStdEvent": "FP_SP_SPEC",
"BriefDescription": "This event counts architecturally executed single-precision floating-point operation."
},
{
"ArchStdEvent": "ASE_FP_SP_SPEC",
"BriefDescription": "This event counts architecturally executed Advanced SIMD single-precision floating-point operation."
},
{
"ArchStdEvent": "SVE_FP_SP_SPEC",
"BriefDescription": "This event counts architecturally executed SVE single-precision floating-point operation."
},
{
"ArchStdEvent": "ASE_SVE_FP_SP_SPEC",
"BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE single-precision floating-point operation."
},
{
"ArchStdEvent": "FP_DP_SPEC",
"BriefDescription": "This event counts architecturally executed double-precision floating-point operation."
},
{
"ArchStdEvent": "ASE_FP_DP_SPEC",
"BriefDescription": "This event counts architecturally executed Advanced SIMD double-precision floating-point operation."
},
{
"ArchStdEvent": "SVE_FP_DP_SPEC",
Annotation
- Atlas domain: Support Tooling And Documentation / tools.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.