tools/perf/pmu-events/arch/arm64/fujitsu/monaka/spec_operation.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/spec_operation.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/arm64/fujitsu/monaka/spec_operation.json
Extension
.json
Size
7976 bytes
Lines
172
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "ArchStdEvent": "BR_MIS_PRED",
        "BriefDescription": "This event counts each correction to the predicted program flow that occurs because of a misprediction from, or no prediction from, the branch prediction resources and that relates to instructions that the branch prediction resources are capable of predicting."
    },
    {
        "ArchStdEvent": "BR_PRED",
        "BriefDescription": "This event counts every branch or other change in the program flow that the branch prediction resources are capable of predicting."
    },
    {
        "ArchStdEvent": "INST_SPEC",
        "BriefDescription": "This event counts every architecturally executed instruction."
    },
    {
        "ArchStdEvent": "OP_SPEC",
        "BriefDescription": "This event counts every speculatively executed micro-operation."
    },
    {
        "ArchStdEvent": "LDREX_SPEC",
        "BriefDescription": "This event counts architecturally executed load-exclusive instructions."
    },
    {
        "ArchStdEvent": "STREX_SPEC",
        "BriefDescription": "This event counts architecturally executed store-exclusive instructions."
    },
    {
        "ArchStdEvent": "LD_SPEC",
        "BriefDescription": "This event counts architecturally executed memory-reading instructions, as defined by the LD_RETIRED event."
    },
    {
        "ArchStdEvent": "ST_SPEC",
        "BriefDescription": "This event counts architecturally executed memory-writing instructions, as defined by the ST_RETIRED event. This event counts DCZVA as a store operation."
    },
    {
        "ArchStdEvent": "LDST_SPEC",
        "BriefDescription": "This event counts architecturally executed memory-reading instructions and memory-writing instructions, as defined by the LD_RETIRED and ST_RETIRED events."
    },
    {
        "ArchStdEvent": "DP_SPEC",
        "BriefDescription": "This event counts architecturally executed integer data-processing instructions. See DP_SPEC of ARMv9 Reference Manual for more information."
    },
    {
        "ArchStdEvent": "ASE_SPEC",
        "BriefDescription": "This event counts architecturally executed Advanced SIMD data-processing instructions."
    },
    {
        "ArchStdEvent": "VFP_SPEC",
        "BriefDescription": "This event counts architecturally executed floating-point data-processing instructions."
    },
    {
        "ArchStdEvent": "PC_WRITE_SPEC",
        "BriefDescription": "This event counts only software changes of the PC that defined by the instruction architecturally executed, condition code check pass, software change of the PC event."
    },
    {
        "ArchStdEvent": "CRYPTO_SPEC",
        "BriefDescription": "This event counts architecturally executed cryptographic instructions, except PMULL and VMULL."
    },
    {
        "ArchStdEvent": "BR_IMMED_SPEC",
        "BriefDescription": "This event counts architecturally executed immediate branch instructions."
    },
    {
        "ArchStdEvent": "BR_RETURN_SPEC",
        "BriefDescription": "This event counts architecturally executed procedure return operations that defined by the BR_RETURN_RETIRED event."
    },
    {
        "ArchStdEvent": "BR_INDIRECT_SPEC",
        "BriefDescription": "This event counts architecturally executed indirect branch instructions that includes software change of the PC other than exception-generating instructions and immediate branch instructions."
    },
    {

Annotation

Implementation Notes