tools/perf/pmu-events/arch/arm64/fujitsu/monaka/tlb.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/tlb.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/arm64/fujitsu/monaka/tlb.json
Extension
.json
Size
14555 bytes
Lines
363
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "ArchStdEvent": "L1I_TLB_REFILL",
        "BriefDescription": "This event counts operations that cause a TLB refill of the L1I TLB. See L1I_TLB_REFILL of ARMv9 Reference Manual for more information."
    },
    {
        "ArchStdEvent": "L1D_TLB_REFILL",
        "BriefDescription": "This event counts operations that cause a TLB refill of the L1D TLB. See L1D_TLB_REFILL of ARMv9 Reference Manual for more information."
    },
    {
        "ArchStdEvent": "L1D_TLB",
        "BriefDescription": "This event counts operations that cause a TLB access to the L1D TLB. See L1D_TLB of ARMv9 Reference Manual for more information."
    },
    {
        "ArchStdEvent": "L1I_TLB",
        "BriefDescription": "This event counts operations that cause a TLB access to the L1I TLB. See L1I_TLB of ARMv9 Reference Manual for more information."
    },
    {
        "ArchStdEvent": "L2D_TLB_REFILL",
        "BriefDescription": "This event counts operations that cause a TLB refill of the L2D TLB. See L2D_TLB_REFILL of ARMv9 Reference Manual for more information."
    },
    {
        "ArchStdEvent": "L2D_TLB",
        "BriefDescription": "This event counts operations that cause a TLB access to the L2D TLB. See L2D_TLB of ARMv9 Reference Manual for more information."
    },
    {
        "ArchStdEvent": "DTLB_WALK",
        "BriefDescription": "This event counts data TLB access with at least one translation table walk."
    },
    {
        "ArchStdEvent": "ITLB_WALK",
        "BriefDescription": "This event counts instruction TLB access with at least one translation table walk."
    },
    {
        "EventCode": "0x0C00",
        "EventName": "L1I_TLB_4K",
        "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 4KB page."
    },
    {
        "EventCode": "0x0C01",
        "EventName": "L1I_TLB_64K",
        "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 64KB page."
    },
    {
        "EventCode": "0x0C02",
        "EventName": "L1I_TLB_2M",
        "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 2MB page."
    },
    {
        "EventCode": "0x0C03",
        "EventName": "L1I_TLB_32M",
        "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 32MB page."
    },
    {
        "EventCode": "0x0C04",
        "EventName": "L1I_TLB_512M",
        "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 512MB page."
    },
    {
        "EventCode": "0x0C05",
        "EventName": "L1I_TLB_1G",
        "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 1GB page."
    },
    {
        "EventCode": "0x0C06",
        "EventName": "L1I_TLB_16G",
        "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 16GB page."
    },
    {
        "EventCode": "0x0C08",

Annotation

Implementation Notes