tools/perf/pmu-events/arch/arm64/nvidia/t410/spec_operation.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/nvidia/t410/spec_operation.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/arm64/nvidia/t410/spec_operation.json
Extension
.json
Size
13409 bytes
Lines
231
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "ArchStdEvent": "INST_SPEC",
        "PublicDescription": "This event counts operations that have been speculatively executed."
    },
    {
        "ArchStdEvent": "OP_SPEC",
        "PublicDescription": "This event counts micro-operations speculatively executed. This is the count of the number of micro-operations dispatched in a cycle."
    },
    {
        "ArchStdEvent": "UNALIGNED_LD_SPEC",
        "PublicDescription": "This event counts unaligned memory Read operations issued by the CPU. This event counts unaligned accesses (as defined by the actual instruction), even if they are subsequently issued as multiple aligned accesses.\nThis event does not count preload operations (PLD, PLI).\nThis event is a subset of the UNALIGNED_LDST_SPEC event."
    },
    {
        "ArchStdEvent": "UNALIGNED_ST_SPEC",
        "PublicDescription": "This event counts unaligned memory Write operations issued by the CPU. This event counts unaligned accesses (as defined by the actual instruction), even if they are subsequently issued as multiple aligned accesses.\nThis event is a subset of the UNALIGNED_LDST_SPEC event."
    },
    {
        "ArchStdEvent": "UNALIGNED_LDST_SPEC",
        "PublicDescription": "This event counts unaligned memory operations issued by the CPU. This event counts unaligned accesses (as defined by the actual instruction), even if they are subsequently issued as multiple aligned accesses.\nThis event is the sum of the following events:\nUNALIGNED_ST_SPEC and\nUNALIGNED_LD_SPEC."
    },
    {
        "ArchStdEvent": "LDREX_SPEC",
        "PublicDescription": "This event counts Load-Exclusive operations that have been speculatively executed. For example: LDREX, LDX"
    },
    {
        "ArchStdEvent": "STREX_PASS_SPEC",
        "PublicDescription": "This event counts Store-exclusive operations that have been speculatively executed and have successfully completed the Store operation."
    },
    {
        "ArchStdEvent": "STREX_FAIL_SPEC",
        "PublicDescription": "This event counts Store-exclusive operations that have been speculatively executed and have not successfully completed the Store operation."
    },
    {
        "ArchStdEvent": "STREX_SPEC",
        "PublicDescription": "This event counts Store-exclusive operations that have been speculatively executed.\nThis event is the sum of the following events:\nSTREX_PASS_SPEC and\nSTREX_FAIL_SPEC."
    },
    {
        "ArchStdEvent": "LD_SPEC",
        "PublicDescription": "This event counts speculatively executed Load operations including Single Instruction Multiple Data (SIMD) Load operations."
    },
    {
        "ArchStdEvent": "ST_SPEC",
        "PublicDescription": "This event counts speculatively executed Store operations including Single Instruction Multiple Data (SIMD) Store operations."
    },
    {
        "ArchStdEvent": "LDST_SPEC",
        "PublicDescription": "This event counts Load and Store operations that have been speculatively executed."
    },
    {
        "ArchStdEvent": "DP_SPEC",
        "PublicDescription": "This event counts speculatively executed logical or arithmetic instructions such as MOV/MVN operations."
    },
    {
        "ArchStdEvent": "ASE_SPEC",
        "PublicDescription": "This event counts speculatively executed Advanced SIMD operations excluding Load, Store, and Move micro-operations that move data to or from SIMD (vector) registers."
    },
    {
        "ArchStdEvent": "VFP_SPEC",
        "PublicDescription": "This event counts speculatively executed floating point operations. This event does not count operations that move data to or from floating point (vector) registers."
    },
    {
        "ArchStdEvent": "PC_WRITE_SPEC",
        "PublicDescription": "This event counts speculatively executed operations which cause software changes of the PC. Those operations include all taken branch operations."
    },
    {
        "ArchStdEvent": "CRYPTO_SPEC",
        "PublicDescription": "This event counts speculatively executed cryptographic operations except for PMULL and VMULL operations."
    },
    {

Annotation

Implementation Notes