tools/perf/pmu-events/arch/arm64/recommended.json
Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/arm64/recommended.json
File Facts
- System
- Linux kernel
- Corpus path
tools/perf/pmu-events/arch/arm64/recommended.json- Extension
.json- Size
- 17066 bytes
- Lines
- 458
- Domain
- Support Tooling And Documentation
- Bucket
- tools
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
[
{
"PublicDescription": "Attributable Level 1 data cache access, read",
"EventCode": "0x40",
"EventName": "L1D_CACHE_RD",
"BriefDescription": "L1D cache access, read"
},
{
"PublicDescription": "Attributable Level 1 data cache access, write",
"EventCode": "0x41",
"EventName": "L1D_CACHE_WR",
"BriefDescription": "L1D cache access, write"
},
{
"PublicDescription": "Attributable Level 1 data cache refill, read",
"EventCode": "0x42",
"EventName": "L1D_CACHE_REFILL_RD",
"BriefDescription": "L1D cache refill, read"
},
{
"PublicDescription": "Attributable Level 1 data cache refill, write",
"EventCode": "0x43",
"EventName": "L1D_CACHE_REFILL_WR",
"BriefDescription": "L1D cache refill, write"
},
{
"PublicDescription": "Attributable Level 1 data cache refill, inner",
"EventCode": "0x44",
"EventName": "L1D_CACHE_REFILL_INNER",
"BriefDescription": "L1D cache refill, inner"
},
{
"PublicDescription": "Attributable Level 1 data cache refill, outer",
"EventCode": "0x45",
"EventName": "L1D_CACHE_REFILL_OUTER",
"BriefDescription": "L1D cache refill, outer"
},
{
"PublicDescription": "Attributable Level 1 data cache Write-Back, victim",
"EventCode": "0x46",
"EventName": "L1D_CACHE_WB_VICTIM",
"BriefDescription": "L1D cache Write-Back, victim"
},
{
"PublicDescription": "Level 1 data cache Write-Back, cleaning and coherency",
"EventCode": "0x47",
"EventName": "L1D_CACHE_WB_CLEAN",
"BriefDescription": "L1D cache Write-Back, cleaning and coherency"
},
{
"PublicDescription": "Attributable Level 1 data cache invalidate",
"EventCode": "0x48",
"EventName": "L1D_CACHE_INVAL",
"BriefDescription": "L1D cache invalidate"
},
{
"PublicDescription": "Attributable Level 1 data TLB refill, read",
"EventCode": "0x4C",
"EventName": "L1D_TLB_REFILL_RD",
"BriefDescription": "L1D tlb refill, read"
},
{
"PublicDescription": "Attributable Level 1 data TLB refill, write",
"EventCode": "0x4D",
"EventName": "L1D_TLB_REFILL_WR",
"BriefDescription": "L1D tlb refill, write"
},
{
"PublicDescription": "Attributable Level 1 data or unified TLB access, read",
"EventCode": "0x4E",
Annotation
- Atlas domain: Support Tooling And Documentation / tools.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.