tools/perf/pmu-events/arch/powerpc/power9/marked.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/powerpc/power9/marked.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/powerpc/power9/marked.json
Extension
.json
Size
27487 bytes
Lines
627
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
  {
    "EventCode": "0x3013E",
    "EventName": "PM_MRK_STALL_CMPLU_CYC",
    "BriefDescription": "Number of cycles the marked instruction is experiencing a stall while it is next to complete (NTC)"
  },
  {
    "EventCode": "0x4F056",
    "EventName": "PM_RADIX_PWC_L1_PDE_FROM_L3MISS",
    "BriefDescription": "A Page Directory Entry was reloaded to a level 1 page walk cache from beyond the core's L3 data cache. The source could be local/remote/distant memory or another core's cache"
  },
  {
    "EventCode": "0x24158",
    "EventName": "PM_MRK_INST",
    "BriefDescription": "An instruction was marked. Includes both Random Instruction Sampling (RIS) at decode time and Random Event Sampling (RES) at the time the configured event happens"
  },
  {
    "EventCode": "0x1E046",
    "EventName": "PM_DPTEG_FROM_L31_SHR",
    "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included"
  },
  {
    "EventCode": "0x3C04A",
    "EventName": "PM_DATA_FROM_RMEM",
    "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to a demand load"
  },
  {
    "EventCode": "0x2C01C",
    "EventName": "PM_CMPLU_STALL_DMISS_REMOTE",
    "BriefDescription": "Completion stall by Dcache miss which resolved from remote chip (cache or memory)"
  },
  {
    "EventCode": "0x44040",
    "EventName": "PM_INST_FROM_L2_DISP_CONFLICT_OTHER",
    "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with dispatch conflict due to an instruction fetch (not prefetch)"
  },
  {
    "EventCode": "0x2E050",
    "EventName": "PM_DARQ0_7_9_ENTRIES",
    "BriefDescription": "Cycles in which 7,8, or 9 DARQ entries (out of 12) are in use"
  },
  {
    "EventCode": "0x2D02E",
    "EventName": "PM_RADIX_PWC_L3_PTE_FROM_L2",
    "BriefDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from the core's L2 data cache. This implies that a level 4 PWC access was not necessary for this translation"
  },
  {
    "EventCode": "0x3F05E",
    "EventName": "PM_RADIX_PWC_L3_PTE_FROM_L3",
    "BriefDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from the core's L3 data cache. This implies that a level 4 PWC access was not necessary for this translation"
  },
  {
    "EventCode": "0x2E01E",
    "EventName": "PM_CMPLU_STALL_NTC_FLUSH",
    "BriefDescription": "Completion stall due to ntc flush"
  },
  {
    "EventCode": "0x1F14C",
    "EventName": "PM_MRK_DPTEG_FROM_LL4",
    "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a marked data side request.. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included"
  },
  {
    "EventCode": "0x20130",
    "EventName": "PM_MRK_INST_DECODED",
    "BriefDescription": "An instruction was marked at decode time. Random Instruction Sampling (RIS) only"
  },
  {
    "EventCode": "0x3F144",
    "EventName": "PM_MRK_DPTEG_FROM_L31_ECO_SHR",
    "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included"

Annotation

Implementation Notes