tools/perf/pmu-events/arch/riscv/sifive/bullet/microarch.json
Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/riscv/sifive/bullet/microarch.json
File Facts
- System
- Linux kernel
- Corpus path
tools/perf/pmu-events/arch/riscv/sifive/bullet/microarch.json- Extension
.json- Size
- 1733 bytes
- Lines
- 58
- Domain
- Support Tooling And Documentation
- Bucket
- tools
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
[
{
"EventName": "ADDRESSGEN_INTERLOCK",
"EventCode": "0x101",
"BriefDescription": "Counts cycles with an address-generation interlock"
},
{
"EventName": "LONGLATENCY_INTERLOCK",
"EventCode": "0x201",
"BriefDescription": "Counts cycles with a long-latency interlock"
},
{
"EventName": "CSR_INTERLOCK",
"EventCode": "0x401",
"BriefDescription": "Counts cycles with a CSR interlock"
},
{
"EventName": "ICACHE_BLOCKED",
"EventCode": "0x801",
"BriefDescription": "Counts cycles in which the instruction cache was not able to provide an instruction"
},
{
"EventName": "DCACHE_BLOCKED",
"EventCode": "0x1001",
"BriefDescription": "Counts cycles in which the data cache blocked an instruction"
},
{
"EventName": "BRANCH_DIRECTION_MISPREDICTION",
"EventCode": "0x2001",
"BriefDescription": "Counts mispredictions of conditional branch direction (taken/not taken)"
},
{
"EventName": "BRANCH_TARGET_MISPREDICTION",
"EventCode": "0x4001",
"BriefDescription": "Counts mispredictions of the target PC of control-flow instructions"
},
{
"EventName": "PIPELINE_FLUSH",
"EventCode": "0x8001",
"BriefDescription": "Counts flushes of the core pipeline. Common causes include fence.i and CSR accesses"
},
{
"EventName": "REPLAY",
"EventCode": "0x10001",
"BriefDescription": "Counts instruction replays"
},
{
"EventName": "INTEGER_MUL_DIV_INTERLOCK",
"EventCode": "0x20001",
"BriefDescription": "Counts cycles with a multiply or divide interlock"
},
{
"EventName": "FP_INTERLOCK",
"EventCode": "0x40001",
"BriefDescription": "Counts cycles with a floating-point interlock"
}
]
Annotation
- Atlas domain: Support Tooling And Documentation / tools.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.