tools/perf/pmu-events/arch/riscv/thead/c900-legacy/cache.json
Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/riscv/thead/c900-legacy/cache.json
File Facts
- System
- Linux kernel
- Corpus path
tools/perf/pmu-events/arch/riscv/thead/c900-legacy/cache.json- Extension
.json- Size
- 1623 bytes
- Lines
- 68
- Domain
- Support Tooling And Documentation
- Bucket
- tools
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
[
{
"EventName": "L1_ICACHE_ACCESS",
"EventCode": "0x00000001",
"BriefDescription": "L1 instruction cache access"
},
{
"EventName": "L1_ICACHE_MISS",
"EventCode": "0x00000002",
"BriefDescription": "L1 instruction cache miss"
},
{
"EventName": "ITLB_MISS",
"EventCode": "0x00000003",
"BriefDescription": "I-UTLB miss"
},
{
"EventName": "DTLB_MISS",
"EventCode": "0x00000004",
"BriefDescription": "D-UTLB miss"
},
{
"EventName": "JTLB_MISS",
"EventCode": "0x00000005",
"BriefDescription": "JTLB miss"
},
{
"EventName": "L1_DCACHE_READ_ACCESS",
"EventCode": "0x0000000c",
"BriefDescription": "L1 data cache read access"
},
{
"EventName": "L1_DCACHE_READ_MISS",
"EventCode": "0x0000000d",
"BriefDescription": "L1 data cache read miss"
},
{
"EventName": "L1_DCACHE_WRITE_ACCESS",
"EventCode": "0x0000000e",
"BriefDescription": "L1 data cache write access"
},
{
"EventName": "L1_DCACHE_WRITE_MISS",
"EventCode": "0x0000000f",
"BriefDescription": "L1 data cache write miss"
},
{
"EventName": "LL_CACHE_READ_ACCESS",
"EventCode": "0x00000010",
"BriefDescription": "LL Cache read access"
},
{
"EventName": "LL_CACHE_READ_MISS",
"EventCode": "0x00000011",
"BriefDescription": "LL Cache read miss"
},
{
"EventName": "LL_CACHE_WRITE_ACCESS",
"EventCode": "0x00000012",
"BriefDescription": "LL Cache write access"
},
{
"EventName": "LL_CACHE_WRITE_MISS",
"EventCode": "0x00000013",
"BriefDescription": "LL Cache write miss"
}
]
Annotation
- Atlas domain: Support Tooling And Documentation / tools.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.