tools/perf/pmu-events/arch/x86/alderlaken/virtual-memory.json
Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/alderlaken/virtual-memory.json
File Facts
- System
- Linux kernel
- Corpus path
tools/perf/pmu-events/arch/x86/alderlaken/virtual-memory.json- Extension
.json- Size
- 3761 bytes
- Lines
- 84
- Domain
- Support Tooling And Documentation
- Bucket
- tools
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
[
{
"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to any page size.",
"Counter": "0,1,2,3,4,5",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetches) whose address translations missed in all Translation Lookaside Buffer (TLB) levels and were mapped to any page size. Includes page walks that page fault.",
"SampleAfterValue": "200003",
"UMask": "0xe"
},
{
"BriefDescription": "Counts the number of page walks completed due to store DTLB misses to any page size.",
"Counter": "0,1,2,3,4,5",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts the number of page walks completed due to stores whose address translations missed in all Translation Lookaside Buffer (TLB) levels and were mapped to any page size. Includes page walks that page fault.",
"SampleAfterValue": "2000003",
"UMask": "0xe"
},
{
"BriefDescription": "Counts the number of page walks initiated by a instruction fetch that missed the first and second level TLBs.",
"Counter": "0,1,2,3,4,5",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.MISS_CAUSED_WALK",
"SampleAfterValue": "1000003",
"UMask": "0x1"
},
{
"BriefDescription": "Counts the number of page walks due to an instruction fetch that miss the PDE (Page Directory Entry) cache.",
"Counter": "0,1,2,3,4,5",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.PDE_CACHE_MISS",
"SampleAfterValue": "2000003",
"UMask": "0x80"
},
{
"BriefDescription": "Counts the number of page walks completed due to instruction fetch misses to any page size.",
"Counter": "0,1,2,3,4,5",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts the number of page walks completed due to instruction fetches whose address translations missed in all Translation Lookaside Buffer (TLB) levels and were mapped to any page size. Includes page walks that page fault.",
"SampleAfterValue": "200003",
"UMask": "0xe"
},
{
"BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer and retirement are both stalled due to a DTLB miss.",
"Counter": "0,1,2,3,4,5",
"EventCode": "0x05",
"EventName": "LD_HEAD.DTLB_MISS_AT_RET",
"SampleAfterValue": "1000003",
"UMask": "0x90"
},
{
"BriefDescription": "This event is deprecated. Refer to new event MEM_UOPS_RETIRED.STLB_MISS",
"Counter": "0,1,2,3,4,5",
"Data_LA": "1",
"Deprecated": "1",
"EventCode": "0xd0",
"EventName": "MEM_UOPS_RETIRED.DTLB_MISS",
"SampleAfterValue": "200003",
"UMask": "0x13"
},
{
"BriefDescription": "This event is deprecated. Refer to new event MEM_UOPS_RETIRED.STLB_MISS_LOADS",
"Counter": "0,1,2,3,4,5",
"Data_LA": "1",
"Deprecated": "1",
"EventCode": "0xd0",
"EventName": "MEM_UOPS_RETIRED.DTLB_MISS_LOADS",
"SampleAfterValue": "200003",
Annotation
- Atlas domain: Support Tooling And Documentation / tools.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.