tools/perf/pmu-events/arch/x86/amdzen2/recommended.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/amdzen2/recommended.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/x86/amdzen2/recommended.json
Extension
.json
Size
5746 bytes
Lines
180
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
  {
    "MetricName": "branch_misprediction_ratio",
    "BriefDescription": "Execution-Time Branch Misprediction Ratio (Non-Speculative)",
    "MetricExpr": "d_ratio(ex_ret_brn_misp, ex_ret_brn)",
    "MetricGroup": "branch_prediction",
    "ScaleUnit": "100%"
  },
  {
    "EventName": "all_dc_accesses",
    "EventCode": "0x29",
    "BriefDescription": "All L1 Data Cache Accesses",
    "UMask": "0x07"
  },
  {
    "MetricName": "all_l2_cache_accesses",
    "BriefDescription": "All L2 Cache Accesses",
    "MetricExpr": "l2_request_g1.all_no_prefetch + l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3",
    "MetricGroup": "l2_cache"
  },
  {
    "EventName": "l2_cache_accesses_from_ic_misses",
    "EventCode": "0x60",
    "BriefDescription": "L2 Cache Accesses from L1 Instruction Cache Misses (including prefetch)",
    "UMask": "0x10"
  },
  {
    "EventName": "l2_cache_accesses_from_dc_misses",
    "EventCode": "0x60",
    "BriefDescription": "L2 Cache Accesses from L1 Data Cache Misses (including prefetch)",
    "UMask": "0xc8"
  },
  {
    "MetricName": "l2_cache_accesses_from_l2_hwpf",
    "BriefDescription": "L2 Cache Accesses from L2 HWPF",
    "MetricExpr": "l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3",
    "MetricGroup": "l2_cache"
  },
  {
    "MetricName": "all_l2_cache_misses",
    "BriefDescription": "All L2 Cache Misses",
    "MetricExpr": "l2_cache_req_stat.ic_dc_miss_in_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3",
    "MetricGroup": "l2_cache"
  },
  {
    "EventName": "l2_cache_misses_from_ic_miss",
    "EventCode": "0x64",
    "BriefDescription": "L2 Cache Misses from L1 Instruction Cache Misses",
    "UMask": "0x01"
  },
  {
    "EventName": "l2_cache_misses_from_dc_misses",
    "EventCode": "0x64",
    "BriefDescription": "L2 Cache Misses from L1 Data Cache Misses",
    "UMask": "0x08"
  },
  {
    "MetricName": "l2_cache_misses_from_l2_hwpf",
    "BriefDescription": "L2 Cache Misses from L2 HWPF",
    "MetricExpr": "l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3",
    "MetricGroup": "l2_cache"
  },
  {
    "MetricName": "all_l2_cache_hits",
    "BriefDescription": "All L2 Cache Hits",
    "MetricExpr": "l2_cache_req_stat.ic_dc_hit_in_l2 + l2_pf_hit_l2",
    "MetricGroup": "l2_cache"
  },
  {
    "EventName": "l2_cache_hits_from_ic_misses",

Annotation

Implementation Notes