tools/perf/pmu-events/arch/x86/amdzen5/branch-prediction.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/amdzen5/branch-prediction.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/x86/amdzen5/branch-prediction.json
Extension
.json
Size
3393 bytes
Lines
94
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
  {
    "EventName": "bp_l1_tlb_miss_l2_tlb_hit",
    "EventCode": "0x84",
    "BriefDescription": "Instruction fetches that miss in the L1 ITLB but hit in the L2 ITLB."
  },
  {
    "EventName": "bp_l1_tlb_miss_l2_tlb_miss.if4k",
    "EventCode": "0x85",
    "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks are requested) for 4k pages.",
    "UMask": "0x01"
  },
  {
    "EventName": "bp_l1_tlb_miss_l2_tlb_miss.if2m",
    "EventCode": "0x85",
    "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks are requested) for 2M pages.",
    "UMask": "0x02"
  },
  {
    "EventName": "bp_l1_tlb_miss_l2_tlb_miss.if1g",
    "EventCode": "0x85",
    "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks are requested) for 1G pages.",
    "UMask": "0x04"
  },
  {
    "EventName": "bp_l1_tlb_miss_l2_tlb_miss.coalesced_4k",
    "EventCode": "0x85",
    "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks are requested) for coalesced pages. A coalesced page is a 16k page created from four adjacent 4k pages.",
    "UMask": "0x08"
  },
  {
    "EventName": "bp_l1_tlb_miss_l2_tlb_miss.all",
    "EventCode": "0x85",
    "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks are requested) for all page sizes.",
    "UMask": "0x0f"
  },
  {
    "EventName": "bp_l2_btb_correct",
    "EventCode": "0x8b",
    "BriefDescription": "L2 branch prediction overrides existing prediction (speculative)."
  },
  {
    "EventName": "bp_dyn_ind_pred",
    "EventCode": "0x8e",
    "BriefDescription": "Dynamic indirect predictions (branch used the indirect predictor to make a prediction)."
  },
  {
    "EventName": "bp_de_redirect",
    "EventCode": "0x91",
    "BriefDescription": "Number of times an early redirect is sent to branch predictor. This happens when either the decoder or dispatch logic is able to detect that the branch predictor needs to be redirected."
  },
  {
    "EventName": "bp_l1_tlb_fetch_hit.if4k",
    "EventCode": "0x94",
    "BriefDescription": "Instruction fetches that hit in the L1 ITLB for 4k or coalesced pages. A coalesced page is a 16k page created from four adjacent 4k pages.",
    "UMask": "0x01"
  },
  {
    "EventName": "bp_l1_tlb_fetch_hit.if2m",
    "EventCode": "0x94",
    "BriefDescription": "Instruction fetches that hit in the L1 ITLB for 2M pages.",
    "UMask": "0x02"
  },
  {
    "EventName": "bp_l1_tlb_fetch_hit.if1g",
    "EventCode": "0x94",
    "BriefDescription": "Instruction fetches that hit in the L1 ITLB for 1G pages.",
    "UMask": "0x04"
  },
  {

Annotation

Implementation Notes