tools/perf/pmu-events/arch/x86/cascadelakex/uncore-io.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-io.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/x86/cascadelakex/uncore-io.json
Extension
.json
Size
200343 bytes
Lines
4954
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "BriefDescription": "PCI Express bandwidth reading at IIO. Derived from unc_iio_data_req_of_cpu.mem_read.part0",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "LLC_MISSES.PCIE_READ",
        "FCMask": "0x07",
        "Filter": "ch_mask=0x1f",
        "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3",
        "MetricName": "LLC_MISSES.PCIE_READ",
        "PerPkg": "1",
        "PortMask": "0x01",
        "PublicDescription": "Counts every read request for 4 bytes of data made by IIO Part0 to a unit on the main die (generally memory). In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.",
        "ScaleUnit": "4Bytes",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCI Express bandwidth writing at IIO. Derived from unc_iio_data_req_of_cpu.mem_write.part0",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "LLC_MISSES.PCIE_WRITE",
        "FCMask": "0x07",
        "Filter": "ch_mask=0x1f",
        "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3",
        "MetricName": "LLC_MISSES.PCIE_WRITE",
        "PerPkg": "1",
        "PortMask": "0x01",
        "PublicDescription": "Counts every write request of 4 bytes of data made by IIO Part0 to a unit on the main die (generally memory). In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.",
        "ScaleUnit": "4Bytes",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Clockticks of the IIO Traffic Controller",
        "Counter": "0,1,2,3",
        "EventCode": "0x1",
        "EventName": "UNC_IIO_CLOCKTICKS",
        "PerPkg": "1",
        "PublicDescription": "Counts clockticks of the 1GHz traffic controller clock in the IIO unit.",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-3",
        "Counter": "0,1,2,3",
        "EventCode": "0xC2",
        "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS",
        "FCMask": "0x4",
        "PerPkg": "1",
        "PortMask": "0x0f",
        "UMask": "0x3",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0",
        "Counter": "0,1,2,3",
        "EventCode": "0xC2",
        "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0",
        "FCMask": "0x4",
        "PerPkg": "1",
        "PortMask": "0x01",
        "UMask": "0x3",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1",
        "Counter": "0,1,2,3",
        "EventCode": "0xC2",
        "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1",
        "FCMask": "0x4",

Annotation

Implementation Notes